Basic Electrical & Electronics Engineering (BT-104)
EXPERIMENT NO. 09
OBJECTIVE:
Perform experiment on Half adder circuit & full adder circuit using XOR, AND and NAND gates.
HALF ADDER CIRCUIT:
APPARATUS REQUIRED:
Logic trainer kit, Logic gates: AND (IC 7408), XOR (IC 7486), NAND (IC 7400).
AIM:
A half adder can add two bits at a time. Its outputs are SUM and CARRY.. for two bit addition SUM will
be 1, if only one input is 1 (X-OR operation). CARRY will be one, when both inputs are 1 (AND
operation). So, by using one AND gate and one X-OR gate, a half adder circuit can be constructed.
Boolean expressions for the outputs are:
SUM = AB' + A'B = A B
CARRY = AB
TRUTH TABLE:
INPUT OUTPUT
S.No.
A B SUM CARRY
1 0 0 0 0
2 0 1 1 0
3 1 0 1 0
4 1 1 0 1
CIRCUIT DIAGRAM:
SUM
XOR
CARRY
AND
Half adder using XOR and AND gates
(Exp. no. 9)1
Department of Electrical and Electronics Engineering / Department of Electrical Engineering
, A SUM
X-OR
B
CARRY
NAND NAND
Half adder using XOR and NAND gates
PROCEDURE:
1. Connect the trainer kit to ac power supply.
2. Connect logic sources to the inputs of the adder.
3. Connect output from SUM and CARRY to logic indicators.
4. Apply various input combinations to the adder.
5. Observe the SUM and CARRY outputs, verify the truth table for each input/output combination.
6. Switch off the ac power supply.
TESTING AND SOLUTION:
Write observations in following tables and check the output:
HALF ADDER
SUM (Volts) CARRY (Volts)
A B SUM CARRY (Write ‘5’ wherever digital output is ‘1’ and ‘0’ wherever digital
output is ‘0’).
0 0
0 1
1 0
1 1
RESULT: The design of the full adder circuits was done and their truth tables were verified.
FULL ADDER CIRCUIT:
APPARATUS REQUIRED:
Logic trainer kit, Logic gates: AND (IC 7408), XOR (IC 7486), NAND (IC 7400), OR (IC 7432).
AIM:
A combinational circuit which performs the arithmetic sum of three input bits is called full adder.
The three input bits include two significant bits and a previous carry bit. A full adder circuit can be
implemented with two half adders and one OR gate.
(Exp. no. 9)2
Department of Electrical and Electronics Engineering / Department of Electrical Engineering
EXPERIMENT NO. 09
OBJECTIVE:
Perform experiment on Half adder circuit & full adder circuit using XOR, AND and NAND gates.
HALF ADDER CIRCUIT:
APPARATUS REQUIRED:
Logic trainer kit, Logic gates: AND (IC 7408), XOR (IC 7486), NAND (IC 7400).
AIM:
A half adder can add two bits at a time. Its outputs are SUM and CARRY.. for two bit addition SUM will
be 1, if only one input is 1 (X-OR operation). CARRY will be one, when both inputs are 1 (AND
operation). So, by using one AND gate and one X-OR gate, a half adder circuit can be constructed.
Boolean expressions for the outputs are:
SUM = AB' + A'B = A B
CARRY = AB
TRUTH TABLE:
INPUT OUTPUT
S.No.
A B SUM CARRY
1 0 0 0 0
2 0 1 1 0
3 1 0 1 0
4 1 1 0 1
CIRCUIT DIAGRAM:
SUM
XOR
CARRY
AND
Half adder using XOR and AND gates
(Exp. no. 9)1
Department of Electrical and Electronics Engineering / Department of Electrical Engineering
, A SUM
X-OR
B
CARRY
NAND NAND
Half adder using XOR and NAND gates
PROCEDURE:
1. Connect the trainer kit to ac power supply.
2. Connect logic sources to the inputs of the adder.
3. Connect output from SUM and CARRY to logic indicators.
4. Apply various input combinations to the adder.
5. Observe the SUM and CARRY outputs, verify the truth table for each input/output combination.
6. Switch off the ac power supply.
TESTING AND SOLUTION:
Write observations in following tables and check the output:
HALF ADDER
SUM (Volts) CARRY (Volts)
A B SUM CARRY (Write ‘5’ wherever digital output is ‘1’ and ‘0’ wherever digital
output is ‘0’).
0 0
0 1
1 0
1 1
RESULT: The design of the full adder circuits was done and their truth tables were verified.
FULL ADDER CIRCUIT:
APPARATUS REQUIRED:
Logic trainer kit, Logic gates: AND (IC 7408), XOR (IC 7486), NAND (IC 7400), OR (IC 7432).
AIM:
A combinational circuit which performs the arithmetic sum of three input bits is called full adder.
The three input bits include two significant bits and a previous carry bit. A full adder circuit can be
implemented with two half adders and one OR gate.
(Exp. no. 9)2
Department of Electrical and Electronics Engineering / Department of Electrical Engineering
