CSE/EEE 120 Lab 2 – Multiplexers, Decoders & ALU | Digital Logic Lab Guide

INSTANT PDF DOWNLOAD. This resource supports CSE/EEE 120 – Lab 2 (Digital Logic Design) and focuses on core combinational building blocks used in processor and digital system design. It helps reinforce how data is selected, routed, decoded, and processed inside digital hardware. Designed as a study and verification reference, this guide strengthens conceptual understanding while working through lab activities. Multiplexers (MUX) Purpose of a multiplexer in digital systems Data selection using control lines 2:1, 4:1, and multi-input MUX operation Truth tables and logic expressions Implementing logic functions using MUX Data routing and bus selection concepts Decoders Role of decoders in digital circuits Binary-to-output line conversion 2-to-4 and 3-to-8 decoder operation Enable inputs Address decoding fundamentals Relationship between decoders and memory addressing Arithmetic and Logic Unit (ALU) Fundamentals Purpose of an ALU in a CPU Arithmetic operations: addition, subtraction Logical operations: AND, OR, XOR, NOT Operation selection using control signals Combining multiplexers and logic blocks to build an ALU Understanding data paths in simple processors Digital Logic Skills Reinforced Truth table development Boolean algebra and simplification Gate-level circuit design Data selection and control logic Combinational circuit analysis Functional block integration CSE EEE 120 Lab 2, Multiplexer Lab Answers, Decoder Circuit Lab, ALU Basics Study, Digital Logic Lab Work, MUX and Decoder Notes, Logic Design Homework, Digital Electronics Lab, Combinational Circuits Help, ALU Design Fundamentals, Boolean Algebra Practice, Computer Engineering Lab, Electrical Engineering Logic, Data Selector Circuit, Processor Logic Basics, Logic Gates and ALU