>>>
>>> AVR I/O and Bit Manipulation
Name: Neil Robert Membreve, M.Eng.
Date:
Department of Electrical Engineering
[~]$ [1/38]
,>>> AVR I/O Ports
■ All AVR Ports have true Read-Modify-Write functionality. Each pin on a
port can be modified without unintentionally modifying any other pin
■ Three I/O memory address locations allocated for each port
■ Long-term memory EEPROM: 1K
■ Data Register { PORTx (Read/Write)
■ Data Direction Register { DDRx (Read/Write)
■ Port Input Pins { PINx (Read)
Figure: Relations Between the Registers and the Pins of AVR
[1. AVR I/O Ports]$ [2/38]
,>>> AVR I/O Ports
■ DDRs and PORTs have a zero initial values for all bits being 0.
■ Writing a 0 to a bit in DDRD sets the corresponding pin to input (and a 1
will set the pin to output). This implies that all pins are initially
configured for input.
■ When set as an input pin, a pull-up resistor can be activated by writing
a 1 to the corresponding PORTD bit.
■ Output buffer can source or sink an absolute maximum current of 40mA per
I/O pin and the whole device can cope with a total of 200mA. (see
datasheet)
[2. AVR I/O Ports]$ [3/38]
, >>> Other usage considerations
■ Regardless of the setting of the DDRx register, the port pin can be read
from PINx. Thus, an driven output value in PORTx can always be read in
PINx.
■ When the "pull-up disable bit" in the Special Function I/O Register
(SFIOR) is set, all pull-ups are disabled regardless of the setting of
DDRx and PORTx. Pullups are also disabled during reset
■ Input pins have a 1.5 clock cycle delay before a new value can be read.
Thus 1 NOP instruction (short delay) necessary to read updated pin
■ Use pull-ups on unused I/O pins to lower power consumption.
■ Using alternative functions of some port pins does not effect other pins.
■ When configuring pins as output pins with HIGH logic, make sure that the
pin is not directly connected to the ground.
■ When configuring pins as output pins with LOW logic, make sure that the
pin is not directly connected to Vcc. When configuring pins as input
pins, the internal pull-up structure must be kept in mind and connections
should be made accordingly
[3. Other usage considerations]$
[4/38]
>>> AVR I/O and Bit Manipulation
Name: Neil Robert Membreve, M.Eng.
Date:
Department of Electrical Engineering
[~]$ [1/38]
,>>> AVR I/O Ports
■ All AVR Ports have true Read-Modify-Write functionality. Each pin on a
port can be modified without unintentionally modifying any other pin
■ Three I/O memory address locations allocated for each port
■ Long-term memory EEPROM: 1K
■ Data Register { PORTx (Read/Write)
■ Data Direction Register { DDRx (Read/Write)
■ Port Input Pins { PINx (Read)
Figure: Relations Between the Registers and the Pins of AVR
[1. AVR I/O Ports]$ [2/38]
,>>> AVR I/O Ports
■ DDRs and PORTs have a zero initial values for all bits being 0.
■ Writing a 0 to a bit in DDRD sets the corresponding pin to input (and a 1
will set the pin to output). This implies that all pins are initially
configured for input.
■ When set as an input pin, a pull-up resistor can be activated by writing
a 1 to the corresponding PORTD bit.
■ Output buffer can source or sink an absolute maximum current of 40mA per
I/O pin and the whole device can cope with a total of 200mA. (see
datasheet)
[2. AVR I/O Ports]$ [3/38]
, >>> Other usage considerations
■ Regardless of the setting of the DDRx register, the port pin can be read
from PINx. Thus, an driven output value in PORTx can always be read in
PINx.
■ When the "pull-up disable bit" in the Special Function I/O Register
(SFIOR) is set, all pull-ups are disabled regardless of the setting of
DDRx and PORTx. Pullups are also disabled during reset
■ Input pins have a 1.5 clock cycle delay before a new value can be read.
Thus 1 NOP instruction (short delay) necessary to read updated pin
■ Use pull-ups on unused I/O pins to lower power consumption.
■ Using alternative functions of some port pins does not effect other pins.
■ When configuring pins as output pins with HIGH logic, make sure that the
pin is not directly connected to the ground.
■ When configuring pins as output pins with LOW logic, make sure that the
pin is not directly connected to Vcc. When configuring pins as input
pins, the internal pull-up structure must be kept in mind and connections
should be made accordingly
[3. Other usage considerations]$
[4/38]
