CSC 415 OPERATING SYSTEM PRINCIPLES UNIT 07 QUESTIONS
AND ANSWERS
Absolute code can be generated for ____________.
Select one:
a. execution-time binding
b. interrupt binding
c. compile-time binding
d. load-time binding - CORRECT ANSWER✅✅c. compile-time binding
Binding means that the address is resolved and no longer needs attention beyond that point.
In a dynamically linked library _________.
Select one:
a. loading is postponed until execution time
b. system language libraries are treated like any other object module
c. a stub is included in the image for each library-routine reference
d. more disk space is used than in a statically linked library - CORRECT ANSWER✅✅c. a stub is included
in the image for each library-routine reference
The mapping of a logical address to a physical address is done in hardware by the _____________.
Select one:
a. relocation register
b. memory-management-unit (MMU)
c. memory address register
d. dynamic loading register - CORRECT ANSWER✅✅b. memory-management-unit (MMU)
Which of the following is true of compaction?
Select one:
,a. It is possible only if relocation is dynamic and done at execution time.
b. It can be done at assembly, load, or execution time.
c. It cannot shuffle memory contents.
d. It is used to solve the problem of internal fragmentation. - CORRECT ANSWER✅✅a. It is possible only
if relocation is dynamic and done at execution time.
_________ is the dynamic storage-allocation algorithm which results in the largest leftover hole in
memory.
Select one:
a. First fit
b. None of the other answers
c. Best fit
d. Worst fit - CORRECT ANSWER✅✅d. Worst fit
_________ is the dynamic storage-allocation algorithm which results in the smallest leftover hole in
memory.
Select one:
a. Worst fit
b. First fit
c. None of the other answers
d. Best fit - CORRECT ANSWER✅✅d. Best fit
Consider a logical address with a page size of 8KB. How many bits must be used to represent the page
offset (displacement) in the logical address?
Select one:
a. 22
b. 8
c. 13
d. 12
e. 10 - CORRECT ANSWER✅✅c. 13
, Given a logical address of 0x9E7 and a page size of 256 bytes and given the page table below, what is the
result of the memory access?
Page TableFrameValidity Bit0x9v0x14v0xAv0x21v0x2v0x7v0xCv0x22v0x24v0x27i0x23v0x1i0i0i0i
Select one:
a. It references physical memory address of 0x27E7.
b. It references physical memory address of 0x24E7.
c. None of the other answers
d. It references physical address 0x24E7 which is not a valid page and causes a page fault.
e. It references physical memory address of 0x279E7.
f. It references physical address 0x27E7 which is not a valid page and causes a page fault. - CORRECT
ANSWER✅✅f. It references physical address 0x27E7 which is not a valid page and causes a page fault.
Assume a system has a TLB hit ratio of 90%. It requires 15 nanoseconds to access the TLB, and 85
nanoseconds to access main memory. What is the effective memory access time (in nanoseconds) for
this system? - CORRECT ANSWER✅✅108.5
Remember that every memory access is 85 nanoseconds. So it will take at least that long, plus the
overhead of the paging table. That is what you want to calculate. With no TLB, then it would be 2
memory accesses of 170 nanoseconds.
Given a logical address of 0x8E7 and a page size of 256 bytes and given the page table below, what is the
physical address (in hex)?
Page TableFrameValidity Bit0x9v0x14v0xAv0x21v0x2v0x7v0xCv0x22v0x24v0x27i0x23v0x1i0i0i0i -
CORRECT ANSWER✅✅0x24E7
Given the logical address 0x478D7A5B (in hexadecimal) with a offset (displacement) size of 12 bits, what
is the page offset? - CORRECT ANSWER✅✅A5B
AND ANSWERS
Absolute code can be generated for ____________.
Select one:
a. execution-time binding
b. interrupt binding
c. compile-time binding
d. load-time binding - CORRECT ANSWER✅✅c. compile-time binding
Binding means that the address is resolved and no longer needs attention beyond that point.
In a dynamically linked library _________.
Select one:
a. loading is postponed until execution time
b. system language libraries are treated like any other object module
c. a stub is included in the image for each library-routine reference
d. more disk space is used than in a statically linked library - CORRECT ANSWER✅✅c. a stub is included
in the image for each library-routine reference
The mapping of a logical address to a physical address is done in hardware by the _____________.
Select one:
a. relocation register
b. memory-management-unit (MMU)
c. memory address register
d. dynamic loading register - CORRECT ANSWER✅✅b. memory-management-unit (MMU)
Which of the following is true of compaction?
Select one:
,a. It is possible only if relocation is dynamic and done at execution time.
b. It can be done at assembly, load, or execution time.
c. It cannot shuffle memory contents.
d. It is used to solve the problem of internal fragmentation. - CORRECT ANSWER✅✅a. It is possible only
if relocation is dynamic and done at execution time.
_________ is the dynamic storage-allocation algorithm which results in the largest leftover hole in
memory.
Select one:
a. First fit
b. None of the other answers
c. Best fit
d. Worst fit - CORRECT ANSWER✅✅d. Worst fit
_________ is the dynamic storage-allocation algorithm which results in the smallest leftover hole in
memory.
Select one:
a. Worst fit
b. First fit
c. None of the other answers
d. Best fit - CORRECT ANSWER✅✅d. Best fit
Consider a logical address with a page size of 8KB. How many bits must be used to represent the page
offset (displacement) in the logical address?
Select one:
a. 22
b. 8
c. 13
d. 12
e. 10 - CORRECT ANSWER✅✅c. 13
, Given a logical address of 0x9E7 and a page size of 256 bytes and given the page table below, what is the
result of the memory access?
Page TableFrameValidity Bit0x9v0x14v0xAv0x21v0x2v0x7v0xCv0x22v0x24v0x27i0x23v0x1i0i0i0i
Select one:
a. It references physical memory address of 0x27E7.
b. It references physical memory address of 0x24E7.
c. None of the other answers
d. It references physical address 0x24E7 which is not a valid page and causes a page fault.
e. It references physical memory address of 0x279E7.
f. It references physical address 0x27E7 which is not a valid page and causes a page fault. - CORRECT
ANSWER✅✅f. It references physical address 0x27E7 which is not a valid page and causes a page fault.
Assume a system has a TLB hit ratio of 90%. It requires 15 nanoseconds to access the TLB, and 85
nanoseconds to access main memory. What is the effective memory access time (in nanoseconds) for
this system? - CORRECT ANSWER✅✅108.5
Remember that every memory access is 85 nanoseconds. So it will take at least that long, plus the
overhead of the paging table. That is what you want to calculate. With no TLB, then it would be 2
memory accesses of 170 nanoseconds.
Given a logical address of 0x8E7 and a page size of 256 bytes and given the page table below, what is the
physical address (in hex)?
Page TableFrameValidity Bit0x9v0x14v0xAv0x21v0x2v0x7v0xCv0x22v0x24v0x27i0x23v0x1i0i0i0i -
CORRECT ANSWER✅✅0x24E7
Given the logical address 0x478D7A5B (in hexadecimal) with a offset (displacement) size of 12 bits, what
is the page offset? - CORRECT ANSWER✅✅A5B
