Computer System Organization Unit 1 – Basics, CPU, Registers & Architecture Notes

B.Tech (Electronics & Communication Engineering) R-20


MALLA REDDY COLLEGE OF ENGINEERING AND TECHNOLOGY
III Year B.Tech. ECE- I Sem L/T/P/C
3/-/-/3
(R20A0411) COMPUTER ORGANIZATION AND
ARCHITECTURE
COURSE OBJECTIVES:
The students will be exposed:
1. To how the Computer Systems work and its basic principles.
2. To ALU operations, Fixed point Arithmetic and floating point Arithmetic.
3. To Instruction set architecture and execution cycle and different types of Control Units.
4. To Memory System Design and different types of Memories.
5. To how the I/O devices are accessed and its principles.
6. To the concepts of pipelining and Parallel Processing.

UNIT-I:
Functional Blocks of a Computer: CPU, memory, Input-Output Unit, control unit, Basic
operational Concepts, Von Neumann Architecture.
Data Representation: Signed number representation, fixed and floating point
Representations, Computer Arithmetic– integer Addition and Subtraction, Ripple carry
adder, carry look-ahead adder, Multiplication – shift-and add, Booth multiplier, carry save
Addition, Division restoring and non-restoring techniques, Floating point arithmetic.

UNIT–II:
Introduction to x86 Architecture
Instruction set Architecture of a CPU: Register Transfer Language, Register Transfer, Memory
Transfer, Instruction Cycle, Addressing modes, Instruction set, CISC vs RISC Architecture.
CPU Control unit design: Hardwired and Micro-programmed design approaches.


UNIT–III:
Memory system design: Semiconductor memory technologies, internal memory
organization.
Memory Organization: Memory Hierarchy, Memory interleaving, Cache memory,
mapping functions, write policies, Virtual Memory Management-Paging.

UNIT–IV:
Peripheral devices and their characteristics: I/O device interface, Data Transfer Modes, I/O
transfers – program controlled, interrupt driven and DMA, interrupts and exceptions, I/O
device interfaces–SCSI, USB




Malla Reddy College of Engineering and Technology (MRCET)

, B.Tech (Electronics & Communication Engineering) R-20
UNIT–V:
Pipelining: Basic concepts of pipelining, pipelining hazards.
Parallel Processors: Introduction to parallel processors, Shared Memory Multiprocessors and
cache coherency.

TEXT BOOKS:
1. “Computer Organization and Embedded Systems”, 6th Edition by Carl Hamacher, McGraw Hill Higher
Education.
2. “Computer Organization and Design”, The Hardware/Software Interface”, 5th Edition by David A. Patterson
and John L. Hennessy, Elsevier.
3. Computer System Architecture|, 3rd Edition by M. Morris Mano, Pearson.

REFERENCE BOOKS:
1. “Computer Architecture and Organization”, 3rd Edition by John P. Hayes, WCB /McGraw-Hill
2. “Computer Organization and Architecture: Designing for Performance”, 10th Edition by William Stallings,
Pearson Education.
3. “Computer System Design and Architecture”, 2nd Edition by Vincent P. Heuring and Harry F. Jordan, Pearson
Education.


COURSE OUTCOMES:

1. Make students understand the working of Computer Systems work and its basic principles
2. Make students understand ALU operations, Fixed point Arithmetic and floating point Arithmetic.
3. Make students understand different types of instructions and Instruction execution cycle along with
types of Control Units.
4. Make students understand Memory System Design and different types of Memories like cache and
virtual memory.
5. Make students understand the access of I/O devices and its principles.
6. Make students understand the concepts of pipelining and Parallel Processing.




Malla Reddy College of Engineering and Technology (MRCET)