CSC 415 Operating Systems EXAM
QUESTIONS WITH CORRECT
SOLUTIONS||100% GUARANTEED
PASS||UPDATED 2026/2027
SYLLABUS||<<NEWEST VERSION>>
It is possible to create a thread library without any kernel-level support.
Select one:
True
False - ANSWER ✓ True
Thread-local storage is data that ____.
Select one:
a. has been modified by the thread, but not yet updated to the parent process
b. is unique to each thread
c. is generated by the thread independent of the thread's process
d. is not associated with any process - ANSWER ✓ b. is unique to each thread
Which of the following would be an acceptable signal handling scheme for a
multithreaded program?
Select one:
a. Deliver the signal to only certain threads in the process.
b. Deliver the signal to every thread in the process.
c. Deliver the signal to the thread to which the signal applies.
d. All the other answers - ANSWER ✓ d. All the other answers
Which of the following technique is well suited to support very large address
space, e.g. 64-bit address space?
Select one:
a. Hierarchical page tables
b. Clustered page tables
,c. All of the above
d. Inverted page tables - ANSWER ✓ b. Clustered page tables
Replacement Question: Address translation from a logical address to a physical
address in IA-32 architecture is comprised of
Select one:
a. a paging unit followed by a segmentation unit that translates the logical address
to its physical address.
b. a segmentation unit followed by a paging unit that translate the logical address
to its physical address.
c. a segmentation unit that translates the logical address to its physical address.
d. a paging unit that translates the logical address to its physical address. -
ANSWER ✓ b. a segmentation unit followed by a paging unit that translate the
logical address to its physical address.
Computing systems need cache because
Select one:
a. All of the about.
b. main memory is expensive and cache offsets the cost.
c. accessing main memory is slow and cache speeds it up.
d. register access is slow and cache speeds it up. - ANSWER ✓ c. accessing main
memory is slow and cache speeds it up.
Replacement question: With segmentation in IA-32 architecture, a logical address
consists of _____.
Select one:
a. segment number, GDT or LDT indicator, protection and offset
b. segment number, page number, GDT/LDT, protection and offset
c. segment number, page number and offset
d. segment number and offset - ANSWER ✓ a. segment number, GDT or LDT
indicator, protection and offset
Hashed page tables are commonly used when handling addresses larger than 32
bits.
Select one:
a. True
b. False - ANSWER ✓ a. True
, A relocation register is used to check for invalid memory addresses generated by a
CPU.
Select one:
a. False
b. True - ANSWER ✓ a. False
A 32-bit logical address with 8 KB page size will have 1,000,000 entries in a
conventional page table.
Select one:
a. False
b. True - ANSWER ✓ a. False
The ARM architecture uses both single-level and two-level paging.
Select one:
a. True
b. False - ANSWER ✓ a. True
Fragmentation does not occur in a paging system.
Select one:
a. False
b. True - ANSWER ✓ a. False
External fragmentation is
Select one:
a. when there is enough total memory space to satisfy a request but the available
spaces are not contiguous.
b. when the amount of available memory is less than the size of a process.
c. when there is some unused memory that cannot be allocated to a process.
d. when a process is broken up into smaller parts for memory allocation. -
ANSWER ✓ a. when there is enough total memory space to satisfy a request but
the available spaces are not contiguous.
Reentrant code is easier to share when paging is used, because
Select one:
a. each process can modify that code its own way.
b. the code doesn't change during execution.
c. All of the above.
d. the code changes are identical for each process. - ANSWER ✓ b. the code
doesn't change during execution.
, A 64-bit architecture with more than 16 quintillion addressable memory
Select one:
a. can support a majority of today's application requirements, but not all.
b. All of the above.
c. is large enough to support all current application requirements but may not be
able to support all future application requirements.
d. is large enough to support all current as well as future application requirements.
- ANSWER ✓ c. is large enough to support all current application requirements
but may not be able to support all future application requirements.
The _____ binding scheme facilitates swapping.
Select one:
a. load time
b. assembly time
c. execution time
d. interrupt time - ANSWER ✓ c. execution time
The roll out, roll in variant of swapping is used ____.
Select one:
a. for the round-robin scheduling algorithm
b. when the load on the system has temporarily been reduced
c. for priority-based scheduling algorithms
d. when a backing store is not necessary - ANSWER ✓ c. for priority-based
scheduling algorithms
A frame table stores
Select one:
a. which frames are allocated.
b. total number of frames.
c. which frames are free.
d. All of the above. - ANSWER ✓ d. All of the above.
Suppose a program is operating with execution-time binding and the physical
address generated is 300. The relocation register is set to 100. What is the
corresponding logical address?
Select one:
a. 201
b. 200
QUESTIONS WITH CORRECT
SOLUTIONS||100% GUARANTEED
PASS||UPDATED 2026/2027
SYLLABUS||<<NEWEST VERSION>>
It is possible to create a thread library without any kernel-level support.
Select one:
True
False - ANSWER ✓ True
Thread-local storage is data that ____.
Select one:
a. has been modified by the thread, but not yet updated to the parent process
b. is unique to each thread
c. is generated by the thread independent of the thread's process
d. is not associated with any process - ANSWER ✓ b. is unique to each thread
Which of the following would be an acceptable signal handling scheme for a
multithreaded program?
Select one:
a. Deliver the signal to only certain threads in the process.
b. Deliver the signal to every thread in the process.
c. Deliver the signal to the thread to which the signal applies.
d. All the other answers - ANSWER ✓ d. All the other answers
Which of the following technique is well suited to support very large address
space, e.g. 64-bit address space?
Select one:
a. Hierarchical page tables
b. Clustered page tables
,c. All of the above
d. Inverted page tables - ANSWER ✓ b. Clustered page tables
Replacement Question: Address translation from a logical address to a physical
address in IA-32 architecture is comprised of
Select one:
a. a paging unit followed by a segmentation unit that translates the logical address
to its physical address.
b. a segmentation unit followed by a paging unit that translate the logical address
to its physical address.
c. a segmentation unit that translates the logical address to its physical address.
d. a paging unit that translates the logical address to its physical address. -
ANSWER ✓ b. a segmentation unit followed by a paging unit that translate the
logical address to its physical address.
Computing systems need cache because
Select one:
a. All of the about.
b. main memory is expensive and cache offsets the cost.
c. accessing main memory is slow and cache speeds it up.
d. register access is slow and cache speeds it up. - ANSWER ✓ c. accessing main
memory is slow and cache speeds it up.
Replacement question: With segmentation in IA-32 architecture, a logical address
consists of _____.
Select one:
a. segment number, GDT or LDT indicator, protection and offset
b. segment number, page number, GDT/LDT, protection and offset
c. segment number, page number and offset
d. segment number and offset - ANSWER ✓ a. segment number, GDT or LDT
indicator, protection and offset
Hashed page tables are commonly used when handling addresses larger than 32
bits.
Select one:
a. True
b. False - ANSWER ✓ a. True
, A relocation register is used to check for invalid memory addresses generated by a
CPU.
Select one:
a. False
b. True - ANSWER ✓ a. False
A 32-bit logical address with 8 KB page size will have 1,000,000 entries in a
conventional page table.
Select one:
a. False
b. True - ANSWER ✓ a. False
The ARM architecture uses both single-level and two-level paging.
Select one:
a. True
b. False - ANSWER ✓ a. True
Fragmentation does not occur in a paging system.
Select one:
a. False
b. True - ANSWER ✓ a. False
External fragmentation is
Select one:
a. when there is enough total memory space to satisfy a request but the available
spaces are not contiguous.
b. when the amount of available memory is less than the size of a process.
c. when there is some unused memory that cannot be allocated to a process.
d. when a process is broken up into smaller parts for memory allocation. -
ANSWER ✓ a. when there is enough total memory space to satisfy a request but
the available spaces are not contiguous.
Reentrant code is easier to share when paging is used, because
Select one:
a. each process can modify that code its own way.
b. the code doesn't change during execution.
c. All of the above.
d. the code changes are identical for each process. - ANSWER ✓ b. the code
doesn't change during execution.
, A 64-bit architecture with more than 16 quintillion addressable memory
Select one:
a. can support a majority of today's application requirements, but not all.
b. All of the above.
c. is large enough to support all current application requirements but may not be
able to support all future application requirements.
d. is large enough to support all current as well as future application requirements.
- ANSWER ✓ c. is large enough to support all current application requirements
but may not be able to support all future application requirements.
The _____ binding scheme facilitates swapping.
Select one:
a. load time
b. assembly time
c. execution time
d. interrupt time - ANSWER ✓ c. execution time
The roll out, roll in variant of swapping is used ____.
Select one:
a. for the round-robin scheduling algorithm
b. when the load on the system has temporarily been reduced
c. for priority-based scheduling algorithms
d. when a backing store is not necessary - ANSWER ✓ c. for priority-based
scheduling algorithms
A frame table stores
Select one:
a. which frames are allocated.
b. total number of frames.
c. which frames are free.
d. All of the above. - ANSWER ✓ d. All of the above.
Suppose a program is operating with execution-time binding and the physical
address generated is 300. The relocation register is set to 100. What is the
corresponding logical address?
Select one:
a. 201
b. 200
