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WGU D481 COMPREHENSIVE STUDY GUIDE 2026 FULL QUESTIONS AN

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WGU D481 COMPREHENSIVE STUDY GUIDE 2026 FULL QUESTIONS AN

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WGU D481 COMPREHENSIVE STUDY GUIDE
2026 FULL QUESTIONS AND SOLUTIONS
GRADED A+

◍ Assembly Language.
Answer: Programming language that has the same structure and set of
commands as machine languages but allows programmers to use symbolic
representations of numeric machine code.
◍ Memory that is lost when disconnected from power..
Answer: Volatile Memory
◍ Automatically allocates more blocks to the table, creates additional buckets,
and distributes rows across all buckets..
Answer: Dynamic Hash Function
◍ swap space.
Answer: The space on the disk reserved for the full virtual memory space of
a process
◍ A group of related entities from a complex model..
Answer: Subject Area
◍ Volatile memory.
Answer: Storage, such as DRAM, that retains data only if it is receiving
power.
◍ Multithreading.
Answer: allows multiple commands, or threads to run simultaneously
◍ forwarding (bypassing).
Answer: A method of resolving a data hazard by retrieving the missing data
element from internal buffers rather than waiting for it to arrive from

, programmer-visible registers or memory
◍ Instruction decode (ID).
Answer: Pull apart the instruction, set up the operation in the ALU, and
compute the source and destination operand addresses
◍ The LIKE operator performs case-insensitive pattern matching by default or
case-sensitive pattern matching if followed by this keyword..
Answer: BINARY
◍ B.PL.
Answer: branch on plusN=0
◍ A high-level representation of data requirements, ignoring implementation
details..
Answer: Entity-Relationship Model
◍ RAID 2.
Answer: Bit-level striping with dedicated Hamming-code parity.
OBSOLETE.
◍ A uniform size used when transferring data between main memory and
storage media. To minimize transfers, relational databases usually store an
entire row in one, which is called row-oriented storage. In column-oriented
storage, each one stores values for a single column only..
Answer: Block
◍ single precision.
Answer: A floating-point value represented in a single 32-bit word.
◍ Description of the structure and format of the occurrences of the entity,
similar to a recipe or architectural blueprints..
Answer: Entity Class
◍ cache ready signal.
Answer: set in the Compare Tag state if requested read or write is a hit
◍ IBM 360/91.
Answer: Introduced many new concepts, including dynamic detection of

, memory hazards, generalized forwarding, and reservation stations.
Tomasulo's algorithmThe internal organization of the 360/91 shares many
features with the Pentium III and Pentium 4, as well as with several other
microprocessors. One major difference was that there was no branch
prediction in the 360/91 and hence no speculation. Another major difference
was that there was no commit unit, so once the instructions finished
execution, they updated the registers.
◍ Transistor.
Answer: An on/off switch controlled by an electric signal
◍ Memory Hierarchy.
Answer: concept that is necessary for the CPU to be able to manipulate data.
◍ Block or group of blocks containing rows/index entries..
Answer: Bucket
◍ A software layer that emulates a complete, independent computing
environment..
Answer: Virtual Machine
◍ AKA: Clustering Index. Usually sparse. Index on a sort column..
Answer: Primary Index
◍ L1 cache (primary cache).
Answer: a cache for a cache
◍ out-of-order execution.
Answer: A situation in pipelined execution when an instruction blocked
from executing does not cause the following instructions to wait.
◍ Database repeatedly splits the index in two until it finds a match..
Answer: Binary Search
◍ Three Cs model.
Answer: A cache model in which all cache misses are classified into one of
three categories: compulsory misses, capacity misses, and conflict misses.
◍ Column A ______________________________ Column B means that each

, B value is related to at most one A value..
Answer: Depends On
◍ TLB events combination.
Answer: +-------+-------------+-------+------------+| TLB | Page table | Cache |
Result |+-------+-------------+-------+------------+| Hit | Hit | Miss | Possible ||
Miss | Hit | Hit | Possible || Miss | Hit | Miss | Possible || Miss | Miss | Miss |
Possible || Hit | Miss | Miss | Impossible || Hit | Miss | Hit | Impossible || Miss
| Miss | Hit | Impossible |+-------+-------------+-------+------------+
◍ Includes CREATE, DROP, ALTER, TRUNCATE, RENAME.
Answer: DDL
◍ store register.
Answer: instruction complementary to load. It copies data from register to
memory.the format is similar to load; name of the operation, followed by the
register to be stored, then the base register, and finally the offset to select the
array element.
◍ Reference Bit (Use Bit or Access Bit).
Answer: A field that is set whenever a page is accessed and that is used to
implement LRU or other replacement schemes.ARMv8 calls it an access bit
◍ Digital Equipment Corporation (DEC).
Answer: A major American company in the computer industry from the
1950s to the 1990s
◍ Subset of table columns..
Answer: Vertical Partition
◍ loop unrolling.
Answer: A technique to get more performance from loops that access arrays,
in which multiple copies of the loop body are made and instructions from
different iterations are scheduled together.
◍ Instruction Set Architecture (ISA).
Answer: Also called architecture. An abstract interface between the

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