WGU C783 COMPREHENSIVE STUDY GUIDE
2026 FULL QUESTIONS AND SOLUTIONS
GRADED A+
◍ critical path.
Answer: is defined as the path with the longest duration from the start of the
project to its completion.
◍ project scope.
Answer: is, simply put, what the result of the project is desired to be.
◍ Risk Appetite.
Answer: is the degree of uncertainty an entity is willing to take on in
anticipation of a reward.
◍ Sacred cow projects.
Answer: are suggested by senior leadership or a powerful constituent of the
company.
◍ Disadvantages of Matrix.
Answer: Requires cooperation and coordination between and among
functional departments and project managers.SMEs not in daily contact with
other SMEs for sharing of technical knowledge.Person with
decision-making power is not always clearly identified.Resource balancing
between projects can lead to friction.Project closeout tasks are often difficult
in strong matrix organizations.Division of authority and responsibility is
complex.
◍ What is PCIC.
Answer: Percent complete index - cost Used when customer agrees to a new
BAC (budget at completion)
,◍ triangular distribution.
Answer: Activity Duration=O+M+P/3
◍ PCIB.
Answer: Percent complete Index BudgetHow much work has been
completedPCIB = EV / BACEarned Value / Budget at Completion
◍ LEGv8 STUR.
Answer: store register
◍ TLB miss.
Answer: indicates that a page is not in the TLB. Another process then finds
and loads the missing page.
◍ Matrix.
Answer: has less clearly defined lines of reporting.
◍ system software.
Answer: The set of programs that enables a computer's hardware devices
and application software to work together; it includes the operating system
and utility programs.
◍ memory ready signal.
Answer: set in the Write Back state when a block is written to memory and
in the Allocate state when a memory read is completed.
◍ spatial locality.
Answer: The principle stating that if a data location is referenced, data
locations with nearby addresses will tend to be referenced soon.
◍ B.EQ.
Answer: equal
◍ lag time.
Answer: makes the successor task start some time after its predecessor ends.
◍ Monthly Financial Report.
Answer: showing progress against the budget quantifying monies spent and
planned to be spent and identifying issues with recommendations for
, resolution
◍ complementary metal-oxide semiconductor (CMOS).
Answer: Dominant technology for integrated circuits
◍ Dynamic branch prediction.
Answer: prediction of branches at runtime using runtime information
◍ Finish-to-Start Relationships (FS).
Answer: is a logical relationship in which a successor activity cannot start
until a predecessor has finished.
◍ Reference Bit (Use Bit or Access Bit).
Answer: A field that is set whenever a page is accessed and that is used to
implement LRU or other replacement schemes.ARMv8 calls it an access bit
◍ The Intrinsity FastMATH TLB.
Answer: The memory system uses 4 KiB pages and just a 32-bit address
space; thus, the virtual page number is 20 bits long. The physical address is
the same size as the virtual address. The TLB contains 16 entries, it is fully
associative, and it is shared between the instruction and data references.
Each entry is 64 bits wide and contains a 20-bit tag (which is the virtual
page number for that TLB entry), the corresponding physical page number
(also 20 bits), a valid bit, a dirty bit, and other bookkeeping bits. Like most
ARMv8 systems, it uses software to handle TLB misses.
◍ Internal dependencies.
Answer: dependencies such as impact on milestones as defined by the
project requirements or under management control
◍ Datapath.
Answer: The component of the processor that performs arithmetic
operations
◍ PCIC Equation.
Answer: PCIC = AC / EACActual Cost / Estimated Cost at Completion
◍ RAID 5.
, Answer: Disk striping with parity. RAID-5 uses three or more disks and
provides fault tolerance.
◍ multiprocessor.
Answer: A term used to refer to a computer with more than one CPU.
◍ SPI > 1 or 100%SPI < 1 or 100%.
Answer: SPI > 1Project team is completing more work in less time than
expectedSPI < 1 Project team is completing less work than what is required
in the time allowed and is behind schedule
◍ Set Associative Cache.
Answer: A cache that has a fixed number of locations (at least two) where
each block can be placed.
◍ Resource Responsibility Matrix.
Answer: the resources needed are identified and the roles and
responsibilities are detailed
◍ Deterministic duration estimation techniques.
Answer: are appropriate when the activity durations are very predictable.
◍ ALU control lines.
Answer: 0000 is AND0001 is OR0010 is ADD0110 is SUBTRACT0111
PASS INPUT B1100 is NOR
◍ Tomasulo's Algorithm.
Answer: An algorithm for dynamic scheduling and out-of-order
executionuses dynamic hazard detection, generalized forwarding, and
reservation stations.
◍ Secondary memory.
Answer: Nonvolatile memory used to store programs and data between runs;
typically consists of flash memory in PMDs and magnetic disks in servers.
◍ Physically addressed cache.
Answer: A cache that is addressed by a physical address.
◍ Reorder Buffer.
2026 FULL QUESTIONS AND SOLUTIONS
GRADED A+
◍ critical path.
Answer: is defined as the path with the longest duration from the start of the
project to its completion.
◍ project scope.
Answer: is, simply put, what the result of the project is desired to be.
◍ Risk Appetite.
Answer: is the degree of uncertainty an entity is willing to take on in
anticipation of a reward.
◍ Sacred cow projects.
Answer: are suggested by senior leadership or a powerful constituent of the
company.
◍ Disadvantages of Matrix.
Answer: Requires cooperation and coordination between and among
functional departments and project managers.SMEs not in daily contact with
other SMEs for sharing of technical knowledge.Person with
decision-making power is not always clearly identified.Resource balancing
between projects can lead to friction.Project closeout tasks are often difficult
in strong matrix organizations.Division of authority and responsibility is
complex.
◍ What is PCIC.
Answer: Percent complete index - cost Used when customer agrees to a new
BAC (budget at completion)
,◍ triangular distribution.
Answer: Activity Duration=O+M+P/3
◍ PCIB.
Answer: Percent complete Index BudgetHow much work has been
completedPCIB = EV / BACEarned Value / Budget at Completion
◍ LEGv8 STUR.
Answer: store register
◍ TLB miss.
Answer: indicates that a page is not in the TLB. Another process then finds
and loads the missing page.
◍ Matrix.
Answer: has less clearly defined lines of reporting.
◍ system software.
Answer: The set of programs that enables a computer's hardware devices
and application software to work together; it includes the operating system
and utility programs.
◍ memory ready signal.
Answer: set in the Write Back state when a block is written to memory and
in the Allocate state when a memory read is completed.
◍ spatial locality.
Answer: The principle stating that if a data location is referenced, data
locations with nearby addresses will tend to be referenced soon.
◍ B.EQ.
Answer: equal
◍ lag time.
Answer: makes the successor task start some time after its predecessor ends.
◍ Monthly Financial Report.
Answer: showing progress against the budget quantifying monies spent and
planned to be spent and identifying issues with recommendations for
, resolution
◍ complementary metal-oxide semiconductor (CMOS).
Answer: Dominant technology for integrated circuits
◍ Dynamic branch prediction.
Answer: prediction of branches at runtime using runtime information
◍ Finish-to-Start Relationships (FS).
Answer: is a logical relationship in which a successor activity cannot start
until a predecessor has finished.
◍ Reference Bit (Use Bit or Access Bit).
Answer: A field that is set whenever a page is accessed and that is used to
implement LRU or other replacement schemes.ARMv8 calls it an access bit
◍ The Intrinsity FastMATH TLB.
Answer: The memory system uses 4 KiB pages and just a 32-bit address
space; thus, the virtual page number is 20 bits long. The physical address is
the same size as the virtual address. The TLB contains 16 entries, it is fully
associative, and it is shared between the instruction and data references.
Each entry is 64 bits wide and contains a 20-bit tag (which is the virtual
page number for that TLB entry), the corresponding physical page number
(also 20 bits), a valid bit, a dirty bit, and other bookkeeping bits. Like most
ARMv8 systems, it uses software to handle TLB misses.
◍ Internal dependencies.
Answer: dependencies such as impact on milestones as defined by the
project requirements or under management control
◍ Datapath.
Answer: The component of the processor that performs arithmetic
operations
◍ PCIC Equation.
Answer: PCIC = AC / EACActual Cost / Estimated Cost at Completion
◍ RAID 5.
, Answer: Disk striping with parity. RAID-5 uses three or more disks and
provides fault tolerance.
◍ multiprocessor.
Answer: A term used to refer to a computer with more than one CPU.
◍ SPI > 1 or 100%SPI < 1 or 100%.
Answer: SPI > 1Project team is completing more work in less time than
expectedSPI < 1 Project team is completing less work than what is required
in the time allowed and is behind schedule
◍ Set Associative Cache.
Answer: A cache that has a fixed number of locations (at least two) where
each block can be placed.
◍ Resource Responsibility Matrix.
Answer: the resources needed are identified and the roles and
responsibilities are detailed
◍ Deterministic duration estimation techniques.
Answer: are appropriate when the activity durations are very predictable.
◍ ALU control lines.
Answer: 0000 is AND0001 is OR0010 is ADD0110 is SUBTRACT0111
PASS INPUT B1100 is NOR
◍ Tomasulo's Algorithm.
Answer: An algorithm for dynamic scheduling and out-of-order
executionuses dynamic hazard detection, generalized forwarding, and
reservation stations.
◍ Secondary memory.
Answer: Nonvolatile memory used to store programs and data between runs;
typically consists of flash memory in PMDs and magnetic disks in servers.
◍ Physically addressed cache.
Answer: A cache that is addressed by a physical address.
◍ Reorder Buffer.
