EXAM 2 ECE 331 QUESTIONS ANSWERED CORRECTLY LATEST UPDATE 2026
BJT transconductance $g_m$ - Answers $g_m = I_C / V_{th}$ where $V_{th} \approx 25$ mV at room
temperature. Higher $I_C$ means higher $g_m$.
BJT small-signal base resistance $r_\pi$ - Answers $r_\pi = \beta / g_m = \beta V_{th} / I_C$. Large
when $I_C$ is small, small when $I_C$ is large.
BJT output resistance $r_o$ - Answers $r_o = V_A / I_C$ where $V_A$ is the Early voltage. Larger
$r_o$ at lower bias currents.
MOSFET transconductance $g_m$ - Answers $g_m = \sqrt{2 \mu_n C_{ox} (W/L) I_D} = 2I_D /
(V_{GS} - V_T)$
MOSFET output resistance $r_o$ - Answers $r_o = 1 / (\lambda I_D)$ where $\lambda$ is the
channel-length modulation parameter.
Miller capacitance (input side) - Answers $C_{M1} = C_{gd}(1 - A_v)$. For inverting amp with $A_v = -
10$, this becomes $11 \cdot C_{gd}$ — often the bandwidth-limiting factor.
Miller capacitance (output side) - Answers $C_{M2} = C_{gd} \cdot (A_v - 1) / A_v$. For large $|A_v|
$, this approaches $C_{gd}$.
Diode-connected MOSFET: resistance - Answers $R_{diode} = 1/(g_m + g_o) \approx 1/g_m$ since
$g_o \ll g_m$. Gate is shorted to drain, device is always in saturation.
Diode-connected MOSFET: dominant capacitance - Answers $C_{gsp}$ dominates the 3dB frequency.
$C_{dgp}$ is shorted out by the gate-drain connection.
CS amp with PMOS active load: voltage gain - Answers $A_v = -g_{mn} \cdot (1/g_{mp} \| R_L)$. The
PMOS diode-connected load acts as a resistor of value $1/g_{mp}$.
How to apply Miller's theorem - Answers Replace a bridging capacitor $C$ across an amp with gain
$A_v$ by: $C_{M1} = C(1 - A_v)$ at input, $C_{M2} = C(A_v - 1)/A_v$ at output. Then analyze input
and output RC circuits separately.
Difference mode half-circuit: approach - Answers 1. Find axis of symmetry. 2. Set voltage at symmetry
point $v_a = 0$ (virtual ground). 3. No current flows through components at symmetry — ignore
them. 4. Analyze one half-circuit with input $v_{id}/2$.
Differential mode voltage gain with emitter degeneration - Answers $A_{vd} \approx -R_L / R_E$
when $(1+\beta_f)R_E \gg r_\pi$. For the practice exam: $A_{vd} = -10\text{k}/1\text{k} = -10$.
General degenerated CE voltage gain - Answers $A_v = -\beta_f R_L' / [r_\pi + (1+\beta_f)R_{E1}]$
where $R_L' = R_C \| R_L$. As $R_E \to 0$, gain becomes $-g_m R_L'$ (not infinity, limited by $r_\
pi$).
Why doesn't $A_v = -R_L/R_E$ go to infinity as $R_E \to 0$? - Answers As $R_E \to 0$, the circuit
becomes a common emitter with $A_{vd} = -g_m R_L'$. The gain is limited by $r_\pi$ in the
denominator of the full formula.
Input resistance: common emitter (no degeneration) - Answers $R_{in} = r_\pi$
Input resistance: CE with emitter degeneration - Answers $R_{in} = r_\pi + (1+\beta_f)R_E$. The
emitter resistor is reflected to the base multiplied by $(1+\beta_f)$.
Factor by which $R_E$ increases $R_{in}$ - Answers Factor $= (1+\beta_f)R_E / r_\pi$. Example: $\
beta = 100$, $R_E = 2$k, $r_\pi = 1.5$k gives factor $= 134.7$, so $R_{in} = 203.5$k.
Input resistance: emitter follower - Answers $R_{in} = r_\pi + (1+\beta_f)R_L$. Same form as
degenerated CE — the load resistance is reflected to the base.
Bias calculations for diff amp: each transistor's $I_C$ - Answers $I_C = I_{BIAS}/2$. Each transistor in
a symmetric diff pair carries half the tail current.
Bias calculations: finding $g_m$ and $r_\pi$ from $I_C$ - Answers $g_m = I_C / V_{th}$ and $r_\pi
= \beta / g_m$. Example: $I_C = 0.5$ mA, $\beta = 100$ gives $g_m = 20$ mA/V and $r_\pi = 5$ k$\
Omega$.
Role of M2 in CS amp with current source load (Amp #1) - Answers M2 is an active load (current
source). It sets the DC bias current and provides a high output resistance $r_{o2}$ as the load, giving
$A_v = -g_m(r_{o1} \| r_{o2})$.
Role of M2 in cascode amp (Amp #2) - Answers M2 is a common-gate (CG) second stage. It reduces
the CS stage gain to $A_{v1} = -1$ (killing Miller C), and boosts output resistance to $R_{out} \approx
g_m r_{o1} r_{o2}$.
Why does the cascode have higher bandwidth than CS? - Answers The CG stage reduces the CS stage
voltage gain to $A_{v1} = -g_{m1}/g_{m2} = -1$, making Miller capacitance only $C_{M1} = 2C_{gd1}$
instead of $(1+g_m R_L)C_{gd}$. The CG stage itself also has no Miller effect.
BJT transconductance $g_m$ - Answers $g_m = I_C / V_{th}$ where $V_{th} \approx 25$ mV at room
temperature. Higher $I_C$ means higher $g_m$.
BJT small-signal base resistance $r_\pi$ - Answers $r_\pi = \beta / g_m = \beta V_{th} / I_C$. Large
when $I_C$ is small, small when $I_C$ is large.
BJT output resistance $r_o$ - Answers $r_o = V_A / I_C$ where $V_A$ is the Early voltage. Larger
$r_o$ at lower bias currents.
MOSFET transconductance $g_m$ - Answers $g_m = \sqrt{2 \mu_n C_{ox} (W/L) I_D} = 2I_D /
(V_{GS} - V_T)$
MOSFET output resistance $r_o$ - Answers $r_o = 1 / (\lambda I_D)$ where $\lambda$ is the
channel-length modulation parameter.
Miller capacitance (input side) - Answers $C_{M1} = C_{gd}(1 - A_v)$. For inverting amp with $A_v = -
10$, this becomes $11 \cdot C_{gd}$ — often the bandwidth-limiting factor.
Miller capacitance (output side) - Answers $C_{M2} = C_{gd} \cdot (A_v - 1) / A_v$. For large $|A_v|
$, this approaches $C_{gd}$.
Diode-connected MOSFET: resistance - Answers $R_{diode} = 1/(g_m + g_o) \approx 1/g_m$ since
$g_o \ll g_m$. Gate is shorted to drain, device is always in saturation.
Diode-connected MOSFET: dominant capacitance - Answers $C_{gsp}$ dominates the 3dB frequency.
$C_{dgp}$ is shorted out by the gate-drain connection.
CS amp with PMOS active load: voltage gain - Answers $A_v = -g_{mn} \cdot (1/g_{mp} \| R_L)$. The
PMOS diode-connected load acts as a resistor of value $1/g_{mp}$.
How to apply Miller's theorem - Answers Replace a bridging capacitor $C$ across an amp with gain
$A_v$ by: $C_{M1} = C(1 - A_v)$ at input, $C_{M2} = C(A_v - 1)/A_v$ at output. Then analyze input
and output RC circuits separately.
Difference mode half-circuit: approach - Answers 1. Find axis of symmetry. 2. Set voltage at symmetry
point $v_a = 0$ (virtual ground). 3. No current flows through components at symmetry — ignore
them. 4. Analyze one half-circuit with input $v_{id}/2$.
Differential mode voltage gain with emitter degeneration - Answers $A_{vd} \approx -R_L / R_E$
when $(1+\beta_f)R_E \gg r_\pi$. For the practice exam: $A_{vd} = -10\text{k}/1\text{k} = -10$.
General degenerated CE voltage gain - Answers $A_v = -\beta_f R_L' / [r_\pi + (1+\beta_f)R_{E1}]$
where $R_L' = R_C \| R_L$. As $R_E \to 0$, gain becomes $-g_m R_L'$ (not infinity, limited by $r_\
pi$).
Why doesn't $A_v = -R_L/R_E$ go to infinity as $R_E \to 0$? - Answers As $R_E \to 0$, the circuit
becomes a common emitter with $A_{vd} = -g_m R_L'$. The gain is limited by $r_\pi$ in the
denominator of the full formula.
Input resistance: common emitter (no degeneration) - Answers $R_{in} = r_\pi$
Input resistance: CE with emitter degeneration - Answers $R_{in} = r_\pi + (1+\beta_f)R_E$. The
emitter resistor is reflected to the base multiplied by $(1+\beta_f)$.
Factor by which $R_E$ increases $R_{in}$ - Answers Factor $= (1+\beta_f)R_E / r_\pi$. Example: $\
beta = 100$, $R_E = 2$k, $r_\pi = 1.5$k gives factor $= 134.7$, so $R_{in} = 203.5$k.
Input resistance: emitter follower - Answers $R_{in} = r_\pi + (1+\beta_f)R_L$. Same form as
degenerated CE — the load resistance is reflected to the base.
Bias calculations for diff amp: each transistor's $I_C$ - Answers $I_C = I_{BIAS}/2$. Each transistor in
a symmetric diff pair carries half the tail current.
Bias calculations: finding $g_m$ and $r_\pi$ from $I_C$ - Answers $g_m = I_C / V_{th}$ and $r_\pi
= \beta / g_m$. Example: $I_C = 0.5$ mA, $\beta = 100$ gives $g_m = 20$ mA/V and $r_\pi = 5$ k$\
Omega$.
Role of M2 in CS amp with current source load (Amp #1) - Answers M2 is an active load (current
source). It sets the DC bias current and provides a high output resistance $r_{o2}$ as the load, giving
$A_v = -g_m(r_{o1} \| r_{o2})$.
Role of M2 in cascode amp (Amp #2) - Answers M2 is a common-gate (CG) second stage. It reduces
the CS stage gain to $A_{v1} = -1$ (killing Miller C), and boosts output resistance to $R_{out} \approx
g_m r_{o1} r_{o2}$.
Why does the cascode have higher bandwidth than CS? - Answers The CG stage reduces the CS stage
voltage gain to $A_{v1} = -g_{m1}/g_{m2} = -1$, making Miller capacitance only $C_{M1} = 2C_{gd1}$
instead of $(1+g_m R_L)C_{gd}$. The CG stage itself also has no Miller effect.
