EEE 120 Final Exam Questions and Answers
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Question 1
What are you NOT allowed to do when building digital logic
circuits? (Multiple Correct Answers are possible. Wrong answers
will deduct points.)
Correct Answer
1. Connect multiple outputs of different gates.
2. Connect an output of a logic gate to twelve inputs of different
gates.
Question 2
True or False: If the carry bit into the MSB of the signed binary numbers
being added is 1, and the carry bit out of the MSB of the signed binary
numbers being added is 0 then there is an overflow.
Correct Answer
True
,Question 3
If you have a 4:16 decoder, how many possible ROM storage units can
you access.
Correct Answer
16
Question 4
In the Princeton Architecture, you can clearly tell the difference
between the opcode and the data.
Correct Answer
False
Question 5
How many Execute state(s) can a controller with a 2-bit FSM have at
maximum, assuming that it has one Fetch state (i.e. do not count the
Fetch state)?
Correct Answer
3
Question 6
,Which one of the Boolean expressions describing a 2:1 Multiplexer is
not identical to the others?
Correct Answer
(A + S')(B + S)
Question 7
True or False a multiplexer has multiple outputs and a decoder has just
a single output.
Correct Answer
False
Question 8
Which of the following statements about the PROM chip is true?
Correct Answer
1. PROM stands for Programmable Read Only Memory.
2. Data to the PROM chip can only be programmed once.
Question 9
Which of the following statements are true?
, Correct Answer
1. ROM stands for "Read Only Memory"
2. There is an internal feedback loop that goes from the Accumulator
to the ALU.
Question 10
Which one of the following statements is incorrect?
Correct Answer
Correct Mealy output should be sampled right after the clock edge.
Question 11
Which combinations of active Enable signals might cause a data conflict
on the Data Bus if enabled simultaneously? (Hint: You might need to
look at the brainless microprocessor diagram.)
Correct Answer
ACC to Data Bus & Read
Question 12
Which 3-input gate outputs a false value only when all inputs are true?
Correct Answer
Latest Version Top Rated A+ 2026
Question 1
What are you NOT allowed to do when building digital logic
circuits? (Multiple Correct Answers are possible. Wrong answers
will deduct points.)
Correct Answer
1. Connect multiple outputs of different gates.
2. Connect an output of a logic gate to twelve inputs of different
gates.
Question 2
True or False: If the carry bit into the MSB of the signed binary numbers
being added is 1, and the carry bit out of the MSB of the signed binary
numbers being added is 0 then there is an overflow.
Correct Answer
True
,Question 3
If you have a 4:16 decoder, how many possible ROM storage units can
you access.
Correct Answer
16
Question 4
In the Princeton Architecture, you can clearly tell the difference
between the opcode and the data.
Correct Answer
False
Question 5
How many Execute state(s) can a controller with a 2-bit FSM have at
maximum, assuming that it has one Fetch state (i.e. do not count the
Fetch state)?
Correct Answer
3
Question 6
,Which one of the Boolean expressions describing a 2:1 Multiplexer is
not identical to the others?
Correct Answer
(A + S')(B + S)
Question 7
True or False a multiplexer has multiple outputs and a decoder has just
a single output.
Correct Answer
False
Question 8
Which of the following statements about the PROM chip is true?
Correct Answer
1. PROM stands for Programmable Read Only Memory.
2. Data to the PROM chip can only be programmed once.
Question 9
Which of the following statements are true?
, Correct Answer
1. ROM stands for "Read Only Memory"
2. There is an internal feedback loop that goes from the Accumulator
to the ALU.
Question 10
Which one of the following statements is incorrect?
Correct Answer
Correct Mealy output should be sampled right after the clock edge.
Question 11
Which combinations of active Enable signals might cause a data conflict
on the Data Bus if enabled simultaneously? (Hint: You might need to
look at the brainless microprocessor diagram.)
Correct Answer
ACC to Data Bus & Read
Question 12
Which 3-input gate outputs a false value only when all inputs are true?
Correct Answer
