CPE 323 QUIZ 3 INTERRUPTS || 100% ACCURATE
SOLUTIONS.
(True | False) Interrupts can be triggered from software (e.g., by setting a flag bit). correct
answers T
1.C. (True | False) Nesting of interrupt service routines by default is disabled in MSP430 because
the GIE bit is cleared during exception processing. correct answers T
1.D. (True | False) Each entry in the interrupt vector table contains the starting address of the
corresponding interrupt service routine. correct answers T
1.E. (True | False) When multiple interrupt requests are pending at the same time, the MSP430
accepts the one that arrived first (earliest in time). correct answers F
1.F (True | False) The MSP430 cannot handle interrupt requests that arise outside the chip.
correct answers F
1.A. (True | False) Interrupts typically arise asynchronously to program execution correct
answers T
What registers are pushed onto the stack during exception processing and popped from the stack
during execution of the RETI instruction? correct answers Program counter and the status
register (PC and SR).
How does the interrupt vector table get initialized? correct answers It is initialized by software
developers (in case of assembly) or compiler (in case of C) by storing the starting addresses of
interrupt service routines into the corresponding entries of the Interrupt Vector Table.
What steps need to be taken in interrupt service routines that serve multi-source requests? correct
answers In case of multi-source interrupts, the interrupt service routine needs to handle
individual requests and to clear the interrupt flag bits explicitly.
Two peripherals P1 and P2 request interrupts at the same time. The ISR_P1 has its starting
address in the entry #9 of the interrupt vector table, and ISR_P2 has its starting address in entry
#6 of the interrupt vector table. Which request will be serviced first providing that both interrupts
are enabled and GIE=1? correct answers ISR_P1
1.A. (True | False) Interrupts can be triggered by external or internal hardware events and may
occur at unpredictable times (i.e., asynchronous to program execution). correct answers T
1.B. (True | False) During exception processing only status register (SR) is pushed on the stack.
correct answers F
1.C. (True | False) Interrupts can be triggered from software (e.g., by setting a flag bit). correct
answers T
SOLUTIONS.
(True | False) Interrupts can be triggered from software (e.g., by setting a flag bit). correct
answers T
1.C. (True | False) Nesting of interrupt service routines by default is disabled in MSP430 because
the GIE bit is cleared during exception processing. correct answers T
1.D. (True | False) Each entry in the interrupt vector table contains the starting address of the
corresponding interrupt service routine. correct answers T
1.E. (True | False) When multiple interrupt requests are pending at the same time, the MSP430
accepts the one that arrived first (earliest in time). correct answers F
1.F (True | False) The MSP430 cannot handle interrupt requests that arise outside the chip.
correct answers F
1.A. (True | False) Interrupts typically arise asynchronously to program execution correct
answers T
What registers are pushed onto the stack during exception processing and popped from the stack
during execution of the RETI instruction? correct answers Program counter and the status
register (PC and SR).
How does the interrupt vector table get initialized? correct answers It is initialized by software
developers (in case of assembly) or compiler (in case of C) by storing the starting addresses of
interrupt service routines into the corresponding entries of the Interrupt Vector Table.
What steps need to be taken in interrupt service routines that serve multi-source requests? correct
answers In case of multi-source interrupts, the interrupt service routine needs to handle
individual requests and to clear the interrupt flag bits explicitly.
Two peripherals P1 and P2 request interrupts at the same time. The ISR_P1 has its starting
address in the entry #9 of the interrupt vector table, and ISR_P2 has its starting address in entry
#6 of the interrupt vector table. Which request will be serviced first providing that both interrupts
are enabled and GIE=1? correct answers ISR_P1
1.A. (True | False) Interrupts can be triggered by external or internal hardware events and may
occur at unpredictable times (i.e., asynchronous to program execution). correct answers T
1.B. (True | False) During exception processing only status register (SR) is pushed on the stack.
correct answers F
1.C. (True | False) Interrupts can be triggered from software (e.g., by setting a flag bit). correct
answers T
