CPE 323 modules 9 and 10 quiz || 100% Correct Answers.
MSP430 Clock modules allow software developers to change frequencies of the clock signals
used by the processor and peripherals.
True
False correct answers True
he primary function of the watchdog
timer module (WDT) is to perform a controlled-system restart after a software problem occurs. If
the selected time interval expires, a system ________ is generated. correct answers he primary
function of the watchdog
timer module (WDT) is to perform a controlled-system restart after a software problem occurs. If
the selected time interval expires, a system reset is generated.
The watchdog timer counter (WDTCNT) is a 32-bit up-counter that is not directly accessible by
software. The WDTCNT is controlled and ________ intervals selected through the watchdog
timer control register WDTCTL. correct answers The watchdog timer counter (WDTCNT) is a
32-bit up-counter that is not directly accessible by software. The WDTCNT is controlled and
time intervals selected through the watchdog timer control register WDTCTL.
The WDTCNT can be ________ from any of ACLK, SMCLK, VLOCLK or X_CLK. The clock
source is selected with the WDTSSEL bit. correct answers The WDTCNT can be sourced from
any of ACLK, SMCLK, VLOCLK or X_CLK. The clock source is selected with the WDTSSEL
bit.
Setting the WDTTMSEL bit to 1 selects the ________ timer mode. This mode can be used to
provide periodic interrupts. In the interval timer mode, the WDTIFG flag is set at the expiration
of the selected time interval.
A PUC is not generated in the interval timer mode at expiration of the selected timer interval and
the WDTIFG enable bit WDTIE remains ________________ . correct answers Setting the
WDTTMSEL bit to 1 selects the interval timer mode. This mode can be used to provide periodic
interrupts. In the interval timer mode, the WDTIFG flag is set at the expiration of the selected
time interval.
A PUC is not generated in the interval timer mode at expiration of the selected timer interval and
the WDTIFG enable bit WDTIE remains unchanged.
The WDTIFG interrupt flag is automatically reset when its interrupt request is ________ , or
may be reset by software. correct answers The WDTIFG interrupt flag is automatically reset
when its interrupt request is serviced, or may be reset by software.
UART communication is asynchronous correct answers UART communication is asynchronous
How does UART communication work? Both the transmitter and receiver should properly
initialize their respective communication interfaces for UART type of communication. The
initialization involves steps to set up the ________________ rates (or bit rates) that defines at
, what speed the communication interfaces transmit/receive data (they should be the same for the
transmitter and receiver), format of characters, and how to handle errors in communication.
correct answers How does UART communication work? Both the transmitter and receiver
should properly initialize their respective communication interfaces for UART type of
communication. The initialization involves steps to set up the baud rates (or bit rates) that defines
at what speed the communication interfaces transmit/receive data (they should be the same for
the transmitter and receiver), format of characters, and how to handle errors in communication.
Upon initialization, the transmitter device (e.g., A) writes a byte of data into a TxBUF (transmit
data buffer) register of its serial communication interface. This character is then typically moved
into a serial shift register and control logic of the communication interface takes care of
________________ data, one bit at a time. The communication interface of the receiver shifts in
one bit of data at a time in its shift register. When all bits in a character are received, the
character is moved into a RxBUF (receive data buffer) register and a flag is set to indicate that a
new character has been received. correct answers Upon initialization, the transmitter device (e.g.,
A) writes a byte of data into a TxBUF (transmit data buffer) register of its serial communication
interface. This character is then typically moved into a serial shift register and control logic of
the communication interface takes care of transmitting data, one bit at a time. The
communication interface of the receiver shifts in one bit of data at a time in its shift register.
When all bits in a character are received, the character is moved into a RxBUF (receive data
buffer) register and a flag is set to indicate that a new character has been received.
Using a software delay keeps the processor running while it is not needed, which leads to
________________ energy. correct answers Using a software delay keeps the processor running
while it is not needed, which leads to wasted energy.
Since a timer can use a different clock signal than the processor, it is possible either to turn off
the processor or to work on other computations while the timer is counting. This saves
________________ and reduces code complexity correct answers Since a timer can use a
different clock signal than the processor, it is possible either to turn off the processor or to work
on other computations while the timer is counting. This saves energy and reduces code
complexity
Compare refers to an operation where actions are triggered at specific moments in time. This
operation is crucial for generating Pulse-Width-Modulated signals (PWMs) - periodic signals
where duty cycles is fully ________________ correct answers Compare refers to an operation
where actions are triggered at specific moments in time. This operation is crucial for generating
Pulse-Width-Modulated signals (PWMs) - periodic signals where duty cycles is fully controlled
The MSP430 clocks MCLK, SMCLK, and ACLK have ________________ frequencies as
follows: MCLK = SMCLK ~ 1MHz and ACLK = 32 KHz. correct answers The MSP430 clocks
MCLK, SMCLK, and ACLK have default frequencies as follows: MCLK = SMCLK ~ 1MHz
and ACLK = 32 KHz
The Universal Serial Communication Interface or USCI for short is a TI peripheral that supports
________________ serial synchronous and asynchronous communication protocols including
UART mode. The UART mode supports several configurable parameters as follows:
MSP430 Clock modules allow software developers to change frequencies of the clock signals
used by the processor and peripherals.
True
False correct answers True
he primary function of the watchdog
timer module (WDT) is to perform a controlled-system restart after a software problem occurs. If
the selected time interval expires, a system ________ is generated. correct answers he primary
function of the watchdog
timer module (WDT) is to perform a controlled-system restart after a software problem occurs. If
the selected time interval expires, a system reset is generated.
The watchdog timer counter (WDTCNT) is a 32-bit up-counter that is not directly accessible by
software. The WDTCNT is controlled and ________ intervals selected through the watchdog
timer control register WDTCTL. correct answers The watchdog timer counter (WDTCNT) is a
32-bit up-counter that is not directly accessible by software. The WDTCNT is controlled and
time intervals selected through the watchdog timer control register WDTCTL.
The WDTCNT can be ________ from any of ACLK, SMCLK, VLOCLK or X_CLK. The clock
source is selected with the WDTSSEL bit. correct answers The WDTCNT can be sourced from
any of ACLK, SMCLK, VLOCLK or X_CLK. The clock source is selected with the WDTSSEL
bit.
Setting the WDTTMSEL bit to 1 selects the ________ timer mode. This mode can be used to
provide periodic interrupts. In the interval timer mode, the WDTIFG flag is set at the expiration
of the selected time interval.
A PUC is not generated in the interval timer mode at expiration of the selected timer interval and
the WDTIFG enable bit WDTIE remains ________________ . correct answers Setting the
WDTTMSEL bit to 1 selects the interval timer mode. This mode can be used to provide periodic
interrupts. In the interval timer mode, the WDTIFG flag is set at the expiration of the selected
time interval.
A PUC is not generated in the interval timer mode at expiration of the selected timer interval and
the WDTIFG enable bit WDTIE remains unchanged.
The WDTIFG interrupt flag is automatically reset when its interrupt request is ________ , or
may be reset by software. correct answers The WDTIFG interrupt flag is automatically reset
when its interrupt request is serviced, or may be reset by software.
UART communication is asynchronous correct answers UART communication is asynchronous
How does UART communication work? Both the transmitter and receiver should properly
initialize their respective communication interfaces for UART type of communication. The
initialization involves steps to set up the ________________ rates (or bit rates) that defines at
, what speed the communication interfaces transmit/receive data (they should be the same for the
transmitter and receiver), format of characters, and how to handle errors in communication.
correct answers How does UART communication work? Both the transmitter and receiver
should properly initialize their respective communication interfaces for UART type of
communication. The initialization involves steps to set up the baud rates (or bit rates) that defines
at what speed the communication interfaces transmit/receive data (they should be the same for
the transmitter and receiver), format of characters, and how to handle errors in communication.
Upon initialization, the transmitter device (e.g., A) writes a byte of data into a TxBUF (transmit
data buffer) register of its serial communication interface. This character is then typically moved
into a serial shift register and control logic of the communication interface takes care of
________________ data, one bit at a time. The communication interface of the receiver shifts in
one bit of data at a time in its shift register. When all bits in a character are received, the
character is moved into a RxBUF (receive data buffer) register and a flag is set to indicate that a
new character has been received. correct answers Upon initialization, the transmitter device (e.g.,
A) writes a byte of data into a TxBUF (transmit data buffer) register of its serial communication
interface. This character is then typically moved into a serial shift register and control logic of
the communication interface takes care of transmitting data, one bit at a time. The
communication interface of the receiver shifts in one bit of data at a time in its shift register.
When all bits in a character are received, the character is moved into a RxBUF (receive data
buffer) register and a flag is set to indicate that a new character has been received.
Using a software delay keeps the processor running while it is not needed, which leads to
________________ energy. correct answers Using a software delay keeps the processor running
while it is not needed, which leads to wasted energy.
Since a timer can use a different clock signal than the processor, it is possible either to turn off
the processor or to work on other computations while the timer is counting. This saves
________________ and reduces code complexity correct answers Since a timer can use a
different clock signal than the processor, it is possible either to turn off the processor or to work
on other computations while the timer is counting. This saves energy and reduces code
complexity
Compare refers to an operation where actions are triggered at specific moments in time. This
operation is crucial for generating Pulse-Width-Modulated signals (PWMs) - periodic signals
where duty cycles is fully ________________ correct answers Compare refers to an operation
where actions are triggered at specific moments in time. This operation is crucial for generating
Pulse-Width-Modulated signals (PWMs) - periodic signals where duty cycles is fully controlled
The MSP430 clocks MCLK, SMCLK, and ACLK have ________________ frequencies as
follows: MCLK = SMCLK ~ 1MHz and ACLK = 32 KHz. correct answers The MSP430 clocks
MCLK, SMCLK, and ACLK have default frequencies as follows: MCLK = SMCLK ~ 1MHz
and ACLK = 32 KHz
The Universal Serial Communication Interface or USCI for short is a TI peripheral that supports
________________ serial synchronous and asynchronous communication protocols including
UART mode. The UART mode supports several configurable parameters as follows:
