Hardware and Operating Systems
Essentials - D386 ACTUAL EXAM/
WGU D386 HARDWARE AND
OPERATING SYSTEM ACTUAL
OBJECTIVE ASSESSMENT EXAM
2026/2027 COMPLETE ACCURATE
EXAM REAL QUESTIONS AND
CORRECT VERIFIED ANSWERS (A
NEW UPDATED VERSION)
Question 1: Which component of a computer is responsible for executing
instructions?
A) RAM
B) CPU
C) Motherboard
D) Hard Drive
Correct ,,,answer,,,,: B) CPU
Rationale: The Central Processing Unit (CPU) is the brain of the computer,
responsible for fetching, decoding, and executing instructions from programs and
the operating system. RAM stores data temporarily, the motherboard connects
components, and the hard drive provides long-term storage.
,Question 2: What type of memory is volatile and loses its contents when power is
removed?
A) ROM
B) SSD
C) RAM
D) HDD
Correct ,,,answer,,,,: C) RAM
Rationale: Random Access Memory (RAM) is volatile memory, meaning it
requires constant power to retain data. When the computer is shut down, all data in
RAM is lost. ROM, SSDs, and HDDs are non-volatile and retain data without
power.
Question 3: Which cache memory level is the smallest but fastest?
A) L3 cache
B) L2 cache
C) L1 cache
D) L4 cache
Correct ,,,answer,,,,: C) L1 cache
Rationale: L1 cache is located directly on the CPU die, operates at CPU speed,
and has the lowest latency. It is typically 32KB–64KB per core—small but
extremely fast. L2 is larger but slower, and L3 is even larger and shared across
cores.
,Question 4: Which set of components make up the central processing unit (CPU)?
A) Control unit and cache memory
B) Arithmetic logic unit and control unit
C) Registers and memory bus
D) ALU and RAM controller
Correct ,,,answer,,,,: B) Arithmetic logic unit and control unit
Rationale: The CPU consists primarily of the Arithmetic Logic Unit (ALU),
which performs arithmetic and logical operations, and the Control Unit (CU),
which fetches, decodes, and executes instructions. Cache and registers are also part
of the CPU but are not the core functional components.
Question 5: Which motherboard component is used for support of slower onboard
peripherals?
A) Northbridge
B) CPU socket
C) Southbridge
D) PCIe slot
Correct ,,,answer,,,,: C) Southbridge
Rationale: The Southbridge chipset handles I/O functions for slower peripherals
like USB ports, SATA connections, audio, and legacy devices. The Northbridge
manages high-speed communication between CPU, RAM, and GPU.
Question 6: How do computers avoid burdening the main CPU with programmed
I/O (PIO)?
, A) By using interrupt-driven I/O exclusively
B) By offloading to a direct-memory-access (DMA) controller
C) By increasing the CPU's clock speed during transfers
D) By storing all data in cache memory first
Correct ,,,answer,,,,: B) By offloading to a direct-memory-access (DMA)
controller
Rationale: DMA allows peripheral devices to transfer data directly to and from
system memory without CPU intervention for every byte. The CPU initiates the
transfer and is notified only when the entire block is complete, freeing it for other
tasks.
Question 7: Which processors can process instructions in both 32-bit and 64-bit
modes?
A) Itanium processors
B) ARM processors only
C) x86 processors only
D) x86-64 processors
Correct ,,,answer,,,,: D) x86-64 processors
Rationale: x86-64 (also called AMD64 or Intel 64) extends the x86 architecture to
support 64-bit computing while maintaining backward compatibility with 32-bit
applications. Itanium uses a completely different architecture and is not fully
backward compatible.
Essentials - D386 ACTUAL EXAM/
WGU D386 HARDWARE AND
OPERATING SYSTEM ACTUAL
OBJECTIVE ASSESSMENT EXAM
2026/2027 COMPLETE ACCURATE
EXAM REAL QUESTIONS AND
CORRECT VERIFIED ANSWERS (A
NEW UPDATED VERSION)
Question 1: Which component of a computer is responsible for executing
instructions?
A) RAM
B) CPU
C) Motherboard
D) Hard Drive
Correct ,,,answer,,,,: B) CPU
Rationale: The Central Processing Unit (CPU) is the brain of the computer,
responsible for fetching, decoding, and executing instructions from programs and
the operating system. RAM stores data temporarily, the motherboard connects
components, and the hard drive provides long-term storage.
,Question 2: What type of memory is volatile and loses its contents when power is
removed?
A) ROM
B) SSD
C) RAM
D) HDD
Correct ,,,answer,,,,: C) RAM
Rationale: Random Access Memory (RAM) is volatile memory, meaning it
requires constant power to retain data. When the computer is shut down, all data in
RAM is lost. ROM, SSDs, and HDDs are non-volatile and retain data without
power.
Question 3: Which cache memory level is the smallest but fastest?
A) L3 cache
B) L2 cache
C) L1 cache
D) L4 cache
Correct ,,,answer,,,,: C) L1 cache
Rationale: L1 cache is located directly on the CPU die, operates at CPU speed,
and has the lowest latency. It is typically 32KB–64KB per core—small but
extremely fast. L2 is larger but slower, and L3 is even larger and shared across
cores.
,Question 4: Which set of components make up the central processing unit (CPU)?
A) Control unit and cache memory
B) Arithmetic logic unit and control unit
C) Registers and memory bus
D) ALU and RAM controller
Correct ,,,answer,,,,: B) Arithmetic logic unit and control unit
Rationale: The CPU consists primarily of the Arithmetic Logic Unit (ALU),
which performs arithmetic and logical operations, and the Control Unit (CU),
which fetches, decodes, and executes instructions. Cache and registers are also part
of the CPU but are not the core functional components.
Question 5: Which motherboard component is used for support of slower onboard
peripherals?
A) Northbridge
B) CPU socket
C) Southbridge
D) PCIe slot
Correct ,,,answer,,,,: C) Southbridge
Rationale: The Southbridge chipset handles I/O functions for slower peripherals
like USB ports, SATA connections, audio, and legacy devices. The Northbridge
manages high-speed communication between CPU, RAM, and GPU.
Question 6: How do computers avoid burdening the main CPU with programmed
I/O (PIO)?
, A) By using interrupt-driven I/O exclusively
B) By offloading to a direct-memory-access (DMA) controller
C) By increasing the CPU's clock speed during transfers
D) By storing all data in cache memory first
Correct ,,,answer,,,,: B) By offloading to a direct-memory-access (DMA)
controller
Rationale: DMA allows peripheral devices to transfer data directly to and from
system memory without CPU intervention for every byte. The CPU initiates the
transfer and is notified only when the entire block is complete, freeing it for other
tasks.
Question 7: Which processors can process instructions in both 32-bit and 64-bit
modes?
A) Itanium processors
B) ARM processors only
C) x86 processors only
D) x86-64 processors
Correct ,,,answer,,,,: D) x86-64 processors
Rationale: x86-64 (also called AMD64 or Intel 64) extends the x86 architecture to
support 64-bit computing while maintaining backward compatibility with 32-bit
applications. Itanium uses a completely different architecture and is not fully
backward compatible.
