Aliasing
A situation in which two addresses access the same object; it can occur in the
virtual memory when there are two virtual addresses for the same physical
page
Integrated circuit
, Also called a chip. A device combining dozens to millions of transistors.
Virtual machines
Developed in the mid-1960s.
Benefits:
Managing software
Managing hardware
TLB miss
indicates that a page is not in the TLB. Another process then finds and loads
the missing page.
Blocking
, a failure to retrieve information that is available in memory even though you
are trying to produce it
can help reduce cache miss rate
virtually addressed cache
A cache that is accessed with a virtual address rather than a physical address
Does not use the TLB
Load-use data hazard:
Give this one a try later!
A specific form of data hazard in which the data being loaded by a load
instruction has not yet become available when it is needed by another
instruction.
Protection
Give this one a try later!
, A set of mechanisms for ensuring that multiple processes sharing the
processor, memory or I/O devices cannot interfere, intentionally or
unintentionally, with one another by reading or writing each other's data.
These mechanism also isolate the operating system from a user process.
capacity miss
Give this one a try later!
A cache miss that occurs because the cache, even with full associativity,
cannot contain all the blocks needed to satisfy the request.
Increase cache size may decrease capacity misses and increase access time
LEGv8 word
Give this one a try later!
A natural unit of access in a computer, usually a group of 32 bits
Single Instruction Stream, Multiple Data Streams (SIMD)
Give this one a try later!
The same instruction is applied to many data streams, as in a vector processor.
A situation in which two addresses access the same object; it can occur in the
virtual memory when there are two virtual addresses for the same physical
page
Integrated circuit
, Also called a chip. A device combining dozens to millions of transistors.
Virtual machines
Developed in the mid-1960s.
Benefits:
Managing software
Managing hardware
TLB miss
indicates that a page is not in the TLB. Another process then finds and loads
the missing page.
Blocking
, a failure to retrieve information that is available in memory even though you
are trying to produce it
can help reduce cache miss rate
virtually addressed cache
A cache that is accessed with a virtual address rather than a physical address
Does not use the TLB
Load-use data hazard:
Give this one a try later!
A specific form of data hazard in which the data being loaded by a load
instruction has not yet become available when it is needed by another
instruction.
Protection
Give this one a try later!
, A set of mechanisms for ensuring that multiple processes sharing the
processor, memory or I/O devices cannot interfere, intentionally or
unintentionally, with one another by reading or writing each other's data.
These mechanism also isolate the operating system from a user process.
capacity miss
Give this one a try later!
A cache miss that occurs because the cache, even with full associativity,
cannot contain all the blocks needed to satisfy the request.
Increase cache size may decrease capacity misses and increase access time
LEGv8 word
Give this one a try later!
A natural unit of access in a computer, usually a group of 32 bits
Single Instruction Stream, Multiple Data Streams (SIMD)
Give this one a try later!
The same instruction is applied to many data streams, as in a vector processor.