WGU | C952
OBJECTIVE ASSESSMENT - EXAM
WGU C952 Computer Architecture - Set 1,
2, 3, 4 & 5 Exam Part 1, 2 & 3 All In One,
250 Total Multiple Choice (50 Per Set)
Questions And Answers (Verified
Answers), 100% Guaranteed Pass ||
Complete A+ Guide
Certification Exam | 2026/2027 Edition
250 100% 2026/2027
QUESTIONS VERIFIED ANSWERS EDITION
TOPICS COVERED
• Binary, Hexadecimal, and Floating-Point Representation
• Cache Memory, Virtual Memory, and TLB
• CPU Components, ALU, and Control Unit Design • Memory Hierarchy Levels and Performance Metrics
• Instruction Pipelining, Hazards, and Stalls • I/O Systems, RAID, and Parallel Architectures
COVER PAGE - 1
3, 4 & 5 Exam Part 1, 2 & 3 All In One, 250 Total Multiple Choice (50 Per Set) Questions And Answers (Verified Answers), 100% Guaranteed Pass || Complete A+ Guide - 20
,SECTION 1 | Data Representation and Number Systems | Q1-Q50 | WGU C952 Computer Architecture - Set
Q1 Question 1 of 250
A 32-bit embedded controller stores sensor readings as signed integers. During a firmware
update, the developer notices that a temperature value of -128 decimal is being interpreted as
+128 in the legacy display module. The developer suspects a mismatch in how the negative
value is encoded.
A. The legacy module reads the value as unsigned, so the sign bit becomes part of the magnitude.
B. The legacy module uses one's complement, where -128 has no representation.
C. The legacy module interprets the data as excess-127, shifting the zero point.
D. The sensor outputs in BCD, but the controller expects two's complement.
Correct Answer: A
Rationale:
In two's complement, -128 is 0x80 (10000000). If read as unsigned 8-bit, that same bit pattern equals +128. The legacy
module is simply treating the signed two's complement pattern as unsigned, which is a common integration bug between
signed and unsigned components.
Q2 Question 2 of 250
A network packet header contains a 16-bit field for payload length. The specification states
the field is stored in big-endian format. A junior engineer reads the raw bytes 0x01 0xF4 from
the wire and reports the payload length as 500 bytes.
A. The engineer is correct because big-endian places the most significant byte first.
B. The engineer is wrong because the bytes should be swapped for little-endian, giving 0xF401 = 62465.
C. The engineer is wrong because the value is actually 0xF401 in big-endian, which equals 62465.
D. The engineer is correct only if the protocol uses network byte order, which is little-endian.
Correct Answer: A
Rationale:
Big-endian stores the most significant byte at the lowest address. Bytes 0x01 0xF4 in big-endian decode to (1 * 256) +
244 = 500. The junior engineer correctly interpreted the big-endian field.
,SECTION 1 | Data Representation and Number Systems | Q1-Q50 | WGU C952 Computer Architecture - Set
Q3 Question 3 of 250
A digital signal processor uses 8-bit fixed-point representation with 4 integer bits and 4
fractional bits (Q4.4 format). An audio sample is stored as the binary value 0010.1100. What
decimal value does this represent?
A. 2.75
B. 2.1875
C. 44.0
D. 2.4375
Correct Answer: A
Rationale:
In Q4.4, the integer part is 0010 = 2, and the fractional part is .1100 = (8+4)/16 = 12/16 = 0.75. Combined: 2 + 0.75 =
2.75. The other options result from misplacing the binary point or treating the entire 8 bits as an integer.
Q4 Question 4 of 250
A compiler generates a 32-bit IEEE 754 single-precision floating-point constant for the value
-6.625. The sign bit is 1. What is the correct 8-bit exponent field in hexadecimal?
A. 0x81
B. 0x82
C. 0xC1
D. 0x80
Correct Answer: A
Rationale:
-6.625 in binary is -110.101 = -1.10101 x 2^2. The exponent bias for single-precision is 127, so stored exponent = 2 +
127 = 129 = 0x81. Option 0x82 would be exponent 130, and 0xC1 is the sign bit combined with an incorrect exponent.
, SECTION 1 | Data Representation and Number Systems | Q1-Q50 | WGU C952 Computer Architecture - Set
Q5 Question 5 of 250
A cryptography library needs to perform bitwise operations on a 64-bit key. The key is stored
as two 32-bit words: high = 0xA5A5A5A5 and low = 0x5A5A5A5A. After applying a bitwise
XOR between the high and low words, what is the resulting 32-bit value in hexadecimal?
A. 0xFFFFFFFF
B. 0x00000000
C. 0xA5A5A5A5
D. 0x5A5A5A5A
Correct Answer: A
Rationale:
0xA5 (10100101) XOR 0x5A (01011010) = 0xFF (11111111). Since every byte pair XORs to 0xFF, the full 32-bit result is
0xFFFFFFFF. This is a fundamental property of complementary bit patterns.
Q6 Question 6 of 250
An embedded system engineer configures a 10-bit unsigned DAC with a 5.0V reference. The
system writes the binary value 01 1100 0010. What output voltage should the engineer
expect?
A. Approximately 2.20V
B. Approximately 1.10V
C. Approximately 3.30V
D. Approximately 4.40V
Correct Answer: A
Rationale:
Binary 01 1100 0010 = 0x1C2 = 1*256 + 12*16 + 2 = 256 + 192 + 2 = 450. For a 10-bit DAC (0-1023), voltage = (450 /
1023) * 5.0V ≈ 0.4399 * 5.0 ≈ 2.20V. The other options would require different input codes (e.g., 225 for ~1.1V, 675 for
~3.3V).
OBJECTIVE ASSESSMENT - EXAM
WGU C952 Computer Architecture - Set 1,
2, 3, 4 & 5 Exam Part 1, 2 & 3 All In One,
250 Total Multiple Choice (50 Per Set)
Questions And Answers (Verified
Answers), 100% Guaranteed Pass ||
Complete A+ Guide
Certification Exam | 2026/2027 Edition
250 100% 2026/2027
QUESTIONS VERIFIED ANSWERS EDITION
TOPICS COVERED
• Binary, Hexadecimal, and Floating-Point Representation
• Cache Memory, Virtual Memory, and TLB
• CPU Components, ALU, and Control Unit Design • Memory Hierarchy Levels and Performance Metrics
• Instruction Pipelining, Hazards, and Stalls • I/O Systems, RAID, and Parallel Architectures
COVER PAGE - 1
3, 4 & 5 Exam Part 1, 2 & 3 All In One, 250 Total Multiple Choice (50 Per Set) Questions And Answers (Verified Answers), 100% Guaranteed Pass || Complete A+ Guide - 20
,SECTION 1 | Data Representation and Number Systems | Q1-Q50 | WGU C952 Computer Architecture - Set
Q1 Question 1 of 250
A 32-bit embedded controller stores sensor readings as signed integers. During a firmware
update, the developer notices that a temperature value of -128 decimal is being interpreted as
+128 in the legacy display module. The developer suspects a mismatch in how the negative
value is encoded.
A. The legacy module reads the value as unsigned, so the sign bit becomes part of the magnitude.
B. The legacy module uses one's complement, where -128 has no representation.
C. The legacy module interprets the data as excess-127, shifting the zero point.
D. The sensor outputs in BCD, but the controller expects two's complement.
Correct Answer: A
Rationale:
In two's complement, -128 is 0x80 (10000000). If read as unsigned 8-bit, that same bit pattern equals +128. The legacy
module is simply treating the signed two's complement pattern as unsigned, which is a common integration bug between
signed and unsigned components.
Q2 Question 2 of 250
A network packet header contains a 16-bit field for payload length. The specification states
the field is stored in big-endian format. A junior engineer reads the raw bytes 0x01 0xF4 from
the wire and reports the payload length as 500 bytes.
A. The engineer is correct because big-endian places the most significant byte first.
B. The engineer is wrong because the bytes should be swapped for little-endian, giving 0xF401 = 62465.
C. The engineer is wrong because the value is actually 0xF401 in big-endian, which equals 62465.
D. The engineer is correct only if the protocol uses network byte order, which is little-endian.
Correct Answer: A
Rationale:
Big-endian stores the most significant byte at the lowest address. Bytes 0x01 0xF4 in big-endian decode to (1 * 256) +
244 = 500. The junior engineer correctly interpreted the big-endian field.
,SECTION 1 | Data Representation and Number Systems | Q1-Q50 | WGU C952 Computer Architecture - Set
Q3 Question 3 of 250
A digital signal processor uses 8-bit fixed-point representation with 4 integer bits and 4
fractional bits (Q4.4 format). An audio sample is stored as the binary value 0010.1100. What
decimal value does this represent?
A. 2.75
B. 2.1875
C. 44.0
D. 2.4375
Correct Answer: A
Rationale:
In Q4.4, the integer part is 0010 = 2, and the fractional part is .1100 = (8+4)/16 = 12/16 = 0.75. Combined: 2 + 0.75 =
2.75. The other options result from misplacing the binary point or treating the entire 8 bits as an integer.
Q4 Question 4 of 250
A compiler generates a 32-bit IEEE 754 single-precision floating-point constant for the value
-6.625. The sign bit is 1. What is the correct 8-bit exponent field in hexadecimal?
A. 0x81
B. 0x82
C. 0xC1
D. 0x80
Correct Answer: A
Rationale:
-6.625 in binary is -110.101 = -1.10101 x 2^2. The exponent bias for single-precision is 127, so stored exponent = 2 +
127 = 129 = 0x81. Option 0x82 would be exponent 130, and 0xC1 is the sign bit combined with an incorrect exponent.
, SECTION 1 | Data Representation and Number Systems | Q1-Q50 | WGU C952 Computer Architecture - Set
Q5 Question 5 of 250
A cryptography library needs to perform bitwise operations on a 64-bit key. The key is stored
as two 32-bit words: high = 0xA5A5A5A5 and low = 0x5A5A5A5A. After applying a bitwise
XOR between the high and low words, what is the resulting 32-bit value in hexadecimal?
A. 0xFFFFFFFF
B. 0x00000000
C. 0xA5A5A5A5
D. 0x5A5A5A5A
Correct Answer: A
Rationale:
0xA5 (10100101) XOR 0x5A (01011010) = 0xFF (11111111). Since every byte pair XORs to 0xFF, the full 32-bit result is
0xFFFFFFFF. This is a fundamental property of complementary bit patterns.
Q6 Question 6 of 250
An embedded system engineer configures a 10-bit unsigned DAC with a 5.0V reference. The
system writes the binary value 01 1100 0010. What output voltage should the engineer
expect?
A. Approximately 2.20V
B. Approximately 1.10V
C. Approximately 3.30V
D. Approximately 4.40V
Correct Answer: A
Rationale:
Binary 01 1100 0010 = 0x1C2 = 1*256 + 12*16 + 2 = 256 + 192 + 2 = 450. For a 10-bit DAC (0-1023), voltage = (450 /
1023) * 5.0V ≈ 0.4399 * 5.0 ≈ 2.20V. The other options would require different input codes (e.g., 225 for ~1.1V, 675 for
~3.3V).
