Department of Computer Science-UBIT Lab #06
Digital Logic Design
Penned by: Faisal haroon
Course: computer logic and
organization
LAB work
HALF ADDER
OBSERVATION TABLE:
A B C(A.B) S(XOR )
0 0 0 0
0 1 0 1
1 0 0 1
1 1 1 0
Expression of sum: AB+AB
Expression of Carry: AB
Table 7.1
CONCLUSION:
A Half Adder is a combinational circuit that adds two binary bits to produce
a two-bit sum. Basically, A Half Adder is the combination of two gates an EX-OR GATE
and the AND Gate. The AND gate deal with the carry and the EX-OR gate deal with sum.
In AND gate, if both of the inputs are high (1) then the output will be high (1). If both or
one of the input is low (0 then resulting value will be low (0). In EX-OR gate, if both inputs
are high (1) or low (0) then the output will be low (0) while if one of input is high (1) and
other is low (0) then the resulting value will be high (1).
1
Digital Logic Design
Penned by: Faisal haroon
Course: computer logic and
organization
LAB work
HALF ADDER
OBSERVATION TABLE:
A B C(A.B) S(XOR )
0 0 0 0
0 1 0 1
1 0 0 1
1 1 1 0
Expression of sum: AB+AB
Expression of Carry: AB
Table 7.1
CONCLUSION:
A Half Adder is a combinational circuit that adds two binary bits to produce
a two-bit sum. Basically, A Half Adder is the combination of two gates an EX-OR GATE
and the AND Gate. The AND gate deal with the carry and the EX-OR gate deal with sum.
In AND gate, if both of the inputs are high (1) then the output will be high (1). If both or
one of the input is low (0 then resulting value will be low (0). In EX-OR gate, if both inputs
are high (1) or low (0) then the output will be low (0) while if one of input is high (1) and
other is low (0) then the resulting value will be high (1).
1
