Lecture-6
Memory Organization
In general, an N x m memory chip can store N words, each word
of m-bits. To access N words, ‘k’ address lines are required
representing k-bit address Ak-1……A0 and m-data lines representing m-
bit data Dm-1….D0. The symbolic diagram of a static memory is shown
below:
+5V
+Vcc GND
k Nxm m
RWM
Ak-1.....A0 Dm-1..... D0
CS WE OE
Fig.2.13 Schematic Diagram of N x m Read Write Memory
The chip has following three control inputs:
a. CS = Chip select or chip enable signal
b. OE = output enable signal
c. WE = write enable signal
All the control signals are active LOW, in general. These are
representative signal. These signals may be active LOW or HIGH for
other memory chips. When the chip is selected then only read/write
, operation can be performed from the addressed memory location. For
memory READ operation, first address is placed on address lines and
then make OE is made LOW, the output is available provided CS is
LOW. Under memory WRITE operation, first the address is place on
address lines and data is place on data lines and WE is made LOW.
The data is written into addressed memory location provided CS is
LOW.
The symbolic diagram of N x m Read Only Memory (ROM) is
shown below:
+5V
+Vcc GND
k Nxm m
ROM
Ak-1.....A0 Dm-1..... D0
CS OE
Fig.2.14 Schematic Diagram of N x m Read Only Memory
The chip is identical to RWM except that user cannot write any
data into it. Therefore, the chip has two control signals- chip selection
signal and output enable signal.
Memory Organization
In general, an N x m memory chip can store N words, each word
of m-bits. To access N words, ‘k’ address lines are required
representing k-bit address Ak-1……A0 and m-data lines representing m-
bit data Dm-1….D0. The symbolic diagram of a static memory is shown
below:
+5V
+Vcc GND
k Nxm m
RWM
Ak-1.....A0 Dm-1..... D0
CS WE OE
Fig.2.13 Schematic Diagram of N x m Read Write Memory
The chip has following three control inputs:
a. CS = Chip select or chip enable signal
b. OE = output enable signal
c. WE = write enable signal
All the control signals are active LOW, in general. These are
representative signal. These signals may be active LOW or HIGH for
other memory chips. When the chip is selected then only read/write
, operation can be performed from the addressed memory location. For
memory READ operation, first address is placed on address lines and
then make OE is made LOW, the output is available provided CS is
LOW. Under memory WRITE operation, first the address is place on
address lines and data is place on data lines and WE is made LOW.
The data is written into addressed memory location provided CS is
LOW.
The symbolic diagram of N x m Read Only Memory (ROM) is
shown below:
+5V
+Vcc GND
k Nxm m
ROM
Ak-1.....A0 Dm-1..... D0
CS OE
Fig.2.14 Schematic Diagram of N x m Read Only Memory
The chip is identical to RWM except that user cannot write any
data into it. Therefore, the chip has two control signals- chip selection
signal and output enable signal.
