Module -4 Contact Hours: 7
CMOS Subsystem Design:
Introduction, Data path operations- Addition/ subtraction-Single bit and Parallel Adder,
Transmission Gate Adder, Parity Generators, Comparators, Zero/one detectors, Binary
counters, Multiplication-Array Multiplication, Shifters-Barrel Shifter.
Data path Subsystems
Chip functions generally can be divided into the following categories:
1. Data path operators
2. Memory elements
3. Control structures
Data path operations-Addition/Subtraction
Addition forms the basis for many processing operations, from ALUs to address generation to
multiplication to filtering. As a result, adder circuits that add two binary numbers are of great
interest to digital system designers. An extensive, almost endless, assortment of adder
architectures serves different speed/power/area requirements. This section begins with half
adders and full adders for single-bit addition
ADDER
HALF ADDER
The half adder adds two single-bit inputs, A and B, The result of two bits are required to
represent the value; they are called the sum S and carry-out Cout. The carry-out is equivalent
to a carry-in to the next more significant column of a multibit adder,
,S=𝐀𝐁 + 𝐀𝐁 =𝐀 𝐁 + 𝐀𝐁
Cout= AB =𝐀 + 𝐁
, FULL ADDER
K-Map:
SUM
, CARRY
CMOS Subsystem Design:
Introduction, Data path operations- Addition/ subtraction-Single bit and Parallel Adder,
Transmission Gate Adder, Parity Generators, Comparators, Zero/one detectors, Binary
counters, Multiplication-Array Multiplication, Shifters-Barrel Shifter.
Data path Subsystems
Chip functions generally can be divided into the following categories:
1. Data path operators
2. Memory elements
3. Control structures
Data path operations-Addition/Subtraction
Addition forms the basis for many processing operations, from ALUs to address generation to
multiplication to filtering. As a result, adder circuits that add two binary numbers are of great
interest to digital system designers. An extensive, almost endless, assortment of adder
architectures serves different speed/power/area requirements. This section begins with half
adders and full adders for single-bit addition
ADDER
HALF ADDER
The half adder adds two single-bit inputs, A and B, The result of two bits are required to
represent the value; they are called the sum S and carry-out Cout. The carry-out is equivalent
to a carry-in to the next more significant column of a multibit adder,
,S=𝐀𝐁 + 𝐀𝐁 =𝐀 𝐁 + 𝐀𝐁
Cout= AB =𝐀 + 𝐁
, FULL ADDER
K-Map:
SUM
, CARRY
