Simulation Lab 4 Answer Sheet Arizona State University EEE 120

EEE 120

Simulation Lab 4 Answer Sheet
The Microprocessor
Name: Shondel Wright

Date: 2/24/2018

Task 4-1: Build the Addressing Logic
Include a picture of your Logisim addressing logic circuit here:




Task 4-2: Build a 4-Bit ROM Memory Cell
Include a picture of your Logisim 4-bit ROM circuit here:




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,Task 4-3: Build 4-Bit Output Port
Include a picture of your Logisim 4-bit output port circuit here:




Test your circuit and record the results in Table 1.

Table 1
Data Bus Memory
(4-bit binary) Write Select Q
0011 1 1 3
0101 1 1 5
0101 1 0 5
1111 0 0 F




2

, Task 4-4: Build the 4-Bit RAM Cell
Include a picture of your Logisim 4-bit RAM circuit here:




Test your circuit and record the results in Table 2. Include a picture of your Logisim 4-bit RAM circuit
testing set up.

Table 2

Data Bus Memory Q {between register Data Bus {after
(4-bit binary) Write Select Read and buffer} buffer}
0000 0 0 0 0000 No Output
1111 1 1 1 1111 1111
1001 1 1 1 1001 1001
0110 1 1 1 0110 0110
0000 1 1 0 0000 No Output
0110 0 1 1 0000 0000




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