Module -IV
•Counters
, Introduction: Counters
Counters are circuits that cycle through a specified
number of states.
Two types of counters:
synchronous (parallel) counters
asynchronous (ripple) counters
Ripple counters allow some flip-flop outputs to be
used as a source of clock for other flip-flops.
Synchronous counters apply the same clock to all
flip-flops.
,Synchronous (Parallel) Counters
Synchronous (parallel) counters: the flip-flops are
clocked at the same time by a common clock pulse.
We can design these counters using the sequential logic
design process .
Example: 2-bit synchronous binary counter (using T flip-
flops, or JK flip-flops with identical J,K inputs).
Present Next Flip-flop
state state inputs
00 01 A1 A0 A1+ A0+ TA 1 TA 0
0 0 0 1 0 1
0 1 1 0 1 1
11 10
1 0 1 1 0 1
1 1 0 0 1 1
, Synchronous (Parallel) Counters
Example: 2-bit synchronous binary counter (using T flip-
flops, or JK flip-flops with identical J,K inputs).
Present Next Flip-flop
state state inputs
A1 A0 A1+ A0+ TA 1 TA 0 TA1 = A0
0 0 0 1 0 1
0 1 1 0 1 1 TA0 = 1
1 0 1 1 0 1
1 1 0 0 1 1
1
A0 J A1
J Q Q
C C
Q' K Q'
K
CLK
•Counters
, Introduction: Counters
Counters are circuits that cycle through a specified
number of states.
Two types of counters:
synchronous (parallel) counters
asynchronous (ripple) counters
Ripple counters allow some flip-flop outputs to be
used as a source of clock for other flip-flops.
Synchronous counters apply the same clock to all
flip-flops.
,Synchronous (Parallel) Counters
Synchronous (parallel) counters: the flip-flops are
clocked at the same time by a common clock pulse.
We can design these counters using the sequential logic
design process .
Example: 2-bit synchronous binary counter (using T flip-
flops, or JK flip-flops with identical J,K inputs).
Present Next Flip-flop
state state inputs
00 01 A1 A0 A1+ A0+ TA 1 TA 0
0 0 0 1 0 1
0 1 1 0 1 1
11 10
1 0 1 1 0 1
1 1 0 0 1 1
, Synchronous (Parallel) Counters
Example: 2-bit synchronous binary counter (using T flip-
flops, or JK flip-flops with identical J,K inputs).
Present Next Flip-flop
state state inputs
A1 A0 A1+ A0+ TA 1 TA 0 TA1 = A0
0 0 0 1 0 1
0 1 1 0 1 1 TA0 = 1
1 0 1 1 0 1
1 1 0 0 1 1
1
A0 J A1
J Q Q
C C
Q' K Q'
K
CLK