Analog Circuits Module-5 18EC42
5.1 Digital-to-Analog Converters
Digital systems such as computers use binary number system to represent data. So before feeding
an analog data input to a digital system, it has to be first converted from analog form to digital
form. The circuit that performs this conversion is called an analog-to-digital (A/D) converter (ADC).
On the other hand, the binary data output from a digital system is difficult to interpret by humans.
So it has to be converted from digital form to analog form. The circuit that performs this conversion
is called a digital-to-analog (D/A) converter (DAC).
We will first study the DAC because of two reasons. (1) It is simpler than ADC, and (2) DAC is a
part of some ADC.
5.1.1 Binary-weighted resistors DAC
Figure shows a DAC using op-amp and binary-weighted resistors (ignore the values of currents
and voltages shown in the figure.)
The binary inputs are connected to the inverting input terminal of the op-amp. The non-inverting
terminal is grounded. This is the same circuit as that of inverting summing amplifier studied
earlier.
In this figure, 4 inputs are shown; so this is a 4-bit DAC. Four switches (b0 – b3) are used to
simulate the binary inputs. Each switch can be connected to either +5V or ground. In practical
situation though, the inputs come from a binary counter.
The resistor values are R, R/2, R/4 and R/8, where R can be any suitable value. For example, R
can be 10 KΩ. So, the other resistor values are 5 KΩ, 2.5 KΩ and 1.25 KΩ. The highest value
resistor R is connected to the LSB input (b0), whereas the lowest value resistor R/8 is connected
to the MSB input (b3).
Now assume that switch b0 is connected to +5V and the remaining three switches are connected
to ground (as shown in the above figure). We know from our earlier discussion that voltage at the
inverting terminal, V2 is zero because of virtual ground. Therefore, current through the resistor R
is +5V/10KΩ = 0.5 mA.
Dept. of E&C Engineering 1 SMVITM Bantakal
,Analog Circuits Module-5 18EC42
The entire current passes through the feedback resistor RF = 1KΩ. So, the output voltage developed
due to input b0 only, is –0.5mA×1KΩ = –0.5V. (Negative sign due to inverting configuration) This
is the smallest output voltage of the DAC when only the LSB input is high, and rest all the inputs
are zeros.
Now assume that switch b1 is connected to +5V and the remaining three switches are connected
to ground (not shown in the figure). This connects the resistor R/2 to +5V, causing the current of
+5V/5KΩ = 1 mA. The output voltage is now –1mA×1KΩ = –1V, which is twice the value of output
when only b0 was connected.
Similarly, when only b2 is connected to +5V, the output voltage will be –2V, and when only b3
(MSB) is connected, the output will be –4V.
If both b0 and b1 are connected to +5V, then the output will be the sum of the corresponding
output voltages: (–0.5V) + (–1V) = –1.5V. Similarly, when all the four inputs are connected to +5V,
that is, binary 1111, the output voltage will be (–0.5V–1V–2V–4V) = –7.5V, which is the highest
output voltage.
The output voltage expression is given below, which is the same as the output of an inverting
scaling amplifier.
b0 b b b
Vo RF R R/12 R/24 R/38
Where, each of the inputs b0 through b3 may be either high (+5V) or low (0V).
Figure below shows the analog outputs for all the possible combinations of the inputs. The graph
is a negative-going staircase with 15 steps of –0.5V each. The maximum (negative) or the fullscale
output voltage is –7.5V.
Dept. of E&C Engineering 2 SMVITM Bantakal
,Analog Circuits Module-5 18EC42
In general, for an n-bit DAC, there will be (2n – 1) steps. The step size depends on the values of RF
and R. The full-scale output voltage is (2n – 1)×(step-size).
Drawbacks
Even though the weighted-resistors DAC circuit is simple to build and understand, it has a severe
drawback that it requires exact values of resistors. If the resistor values are not accurate then the
step sizes will not remain the same, resulting in error. For accurate operations, we have to use
precision metal-film resistors.
Further, the values of RF and R must be properly chosen such that the maximum output voltage
does not exceed the saturation level –Vsat of the op-amp.
Example-1
Design a 4-bit weighted-resistor DAC to get full-scale output of –11.25 V.
Sol
Full-scale output = (2n – 1) × step-size
=> –11.25 = (24 – 1) × step-size
=> Step-size = –11. = –0.75 V
Step-size = –RF/R × 5V
=> RF/R = 0.75V/5V = 0.15
That is, the ratio of RF to R should be 0.15. So, choose RF = 1.5KΩ and R = 10KΩ
The circuit diagram will be the same as before, with RF = 1.5 KΩ. Other resistor values remain the
same.
Example-2
In the above example, if RF is chosen to be 2 KΩ, with other resistor values same as before, will the
DAC function properly?
Sol
With RF = 2KΩ and R = 10KΩ, step-size is = –(2KΩ/10KΩ)×5V = –1V
Full-scale output voltage is 15 × –1V = –15V.
Usually, for op-amp with ±15V supply voltages, Vsat = 14V or slightly lower. So, it is not possible
to get –15V output voltage, which is the full-scale value in this example. Therefore, the DAC will
not function properly.
Dept. of E&C Engineering 3 SMVITM Bantakal
, Analog Circuits Module-5 18EC42
5.1.2 R-2R resistors DAC
Figure shows the R-2R resistors DAC.
In this figure, four inputs are shown; so this is a 4-bit DAC. Four switches, b0 through b3, are used
to simulate the binary inputs. Each switch can be connected to either +5V or ground. Note that in
this circuit, other than RF, only two values of resistors are used: R and 2R. For example, R can be
10KΩ and 2R = 20KΩ, or R can be 1KΩ, and 2R = 2KΩ.
In this circuit, the binary input which is nearest to the op-amp is MSB (b3), and the binary input
which is farthest away from the op-amp is LSB (b0).
Now assume that only MSB bit b3 is connected to +5V, and the other three switches are connected
to ground. The resulting R-2R network is shown below:
Dept. of E&C Engineering 4 SMVITM Bantakal
5.1 Digital-to-Analog Converters
Digital systems such as computers use binary number system to represent data. So before feeding
an analog data input to a digital system, it has to be first converted from analog form to digital
form. The circuit that performs this conversion is called an analog-to-digital (A/D) converter (ADC).
On the other hand, the binary data output from a digital system is difficult to interpret by humans.
So it has to be converted from digital form to analog form. The circuit that performs this conversion
is called a digital-to-analog (D/A) converter (DAC).
We will first study the DAC because of two reasons. (1) It is simpler than ADC, and (2) DAC is a
part of some ADC.
5.1.1 Binary-weighted resistors DAC
Figure shows a DAC using op-amp and binary-weighted resistors (ignore the values of currents
and voltages shown in the figure.)
The binary inputs are connected to the inverting input terminal of the op-amp. The non-inverting
terminal is grounded. This is the same circuit as that of inverting summing amplifier studied
earlier.
In this figure, 4 inputs are shown; so this is a 4-bit DAC. Four switches (b0 – b3) are used to
simulate the binary inputs. Each switch can be connected to either +5V or ground. In practical
situation though, the inputs come from a binary counter.
The resistor values are R, R/2, R/4 and R/8, where R can be any suitable value. For example, R
can be 10 KΩ. So, the other resistor values are 5 KΩ, 2.5 KΩ and 1.25 KΩ. The highest value
resistor R is connected to the LSB input (b0), whereas the lowest value resistor R/8 is connected
to the MSB input (b3).
Now assume that switch b0 is connected to +5V and the remaining three switches are connected
to ground (as shown in the above figure). We know from our earlier discussion that voltage at the
inverting terminal, V2 is zero because of virtual ground. Therefore, current through the resistor R
is +5V/10KΩ = 0.5 mA.
Dept. of E&C Engineering 1 SMVITM Bantakal
,Analog Circuits Module-5 18EC42
The entire current passes through the feedback resistor RF = 1KΩ. So, the output voltage developed
due to input b0 only, is –0.5mA×1KΩ = –0.5V. (Negative sign due to inverting configuration) This
is the smallest output voltage of the DAC when only the LSB input is high, and rest all the inputs
are zeros.
Now assume that switch b1 is connected to +5V and the remaining three switches are connected
to ground (not shown in the figure). This connects the resistor R/2 to +5V, causing the current of
+5V/5KΩ = 1 mA. The output voltage is now –1mA×1KΩ = –1V, which is twice the value of output
when only b0 was connected.
Similarly, when only b2 is connected to +5V, the output voltage will be –2V, and when only b3
(MSB) is connected, the output will be –4V.
If both b0 and b1 are connected to +5V, then the output will be the sum of the corresponding
output voltages: (–0.5V) + (–1V) = –1.5V. Similarly, when all the four inputs are connected to +5V,
that is, binary 1111, the output voltage will be (–0.5V–1V–2V–4V) = –7.5V, which is the highest
output voltage.
The output voltage expression is given below, which is the same as the output of an inverting
scaling amplifier.
b0 b b b
Vo RF R R/12 R/24 R/38
Where, each of the inputs b0 through b3 may be either high (+5V) or low (0V).
Figure below shows the analog outputs for all the possible combinations of the inputs. The graph
is a negative-going staircase with 15 steps of –0.5V each. The maximum (negative) or the fullscale
output voltage is –7.5V.
Dept. of E&C Engineering 2 SMVITM Bantakal
,Analog Circuits Module-5 18EC42
In general, for an n-bit DAC, there will be (2n – 1) steps. The step size depends on the values of RF
and R. The full-scale output voltage is (2n – 1)×(step-size).
Drawbacks
Even though the weighted-resistors DAC circuit is simple to build and understand, it has a severe
drawback that it requires exact values of resistors. If the resistor values are not accurate then the
step sizes will not remain the same, resulting in error. For accurate operations, we have to use
precision metal-film resistors.
Further, the values of RF and R must be properly chosen such that the maximum output voltage
does not exceed the saturation level –Vsat of the op-amp.
Example-1
Design a 4-bit weighted-resistor DAC to get full-scale output of –11.25 V.
Sol
Full-scale output = (2n – 1) × step-size
=> –11.25 = (24 – 1) × step-size
=> Step-size = –11. = –0.75 V
Step-size = –RF/R × 5V
=> RF/R = 0.75V/5V = 0.15
That is, the ratio of RF to R should be 0.15. So, choose RF = 1.5KΩ and R = 10KΩ
The circuit diagram will be the same as before, with RF = 1.5 KΩ. Other resistor values remain the
same.
Example-2
In the above example, if RF is chosen to be 2 KΩ, with other resistor values same as before, will the
DAC function properly?
Sol
With RF = 2KΩ and R = 10KΩ, step-size is = –(2KΩ/10KΩ)×5V = –1V
Full-scale output voltage is 15 × –1V = –15V.
Usually, for op-amp with ±15V supply voltages, Vsat = 14V or slightly lower. So, it is not possible
to get –15V output voltage, which is the full-scale value in this example. Therefore, the DAC will
not function properly.
Dept. of E&C Engineering 3 SMVITM Bantakal
, Analog Circuits Module-5 18EC42
5.1.2 R-2R resistors DAC
Figure shows the R-2R resistors DAC.
In this figure, four inputs are shown; so this is a 4-bit DAC. Four switches, b0 through b3, are used
to simulate the binary inputs. Each switch can be connected to either +5V or ground. Note that in
this circuit, other than RF, only two values of resistors are used: R and 2R. For example, R can be
10KΩ and 2R = 20KΩ, or R can be 1KΩ, and 2R = 2KΩ.
In this circuit, the binary input which is nearest to the op-amp is MSB (b3), and the binary input
which is farthest away from the op-amp is LSB (b0).
Now assume that only MSB bit b3 is connected to +5V, and the other three switches are connected
to ground. The resulting R-2R network is shown below:
Dept. of E&C Engineering 4 SMVITM Bantakal