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CPEN 4700 Exam Two Review (Answered) 100%

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CPEN 4700 Exam Two Review (Answered) 100% CPU's Three Major Components An Arithmetic/Logic Unit (ALU) that performs computations on binary data. Registers that are used to hold operands and/or memory addresses for operands A control unit that controls and sequences the behavior of the other components (and rest of system) based on programmed instructions Von Neumann execution cycle Design of a machine that carries out the steps. Involves: Fetching, decoding, executing, and writing back instructions (FDEW) Instruction Set Architecture (ISA) The part of the computer architecture related to programming, including the native data types, instructions, registers, addressing modes, memory architecture, interrupt and exception handling, and external I/O. Computer systems that share an ISA are compatible – meaning they can execute the same programs bit fields Within a machine language instruction format of a given number of bits, the bits are divided into this. Each part has a specific meaning to the control unit. EX IMAGE (16 bits divided into a total of five bit fields) Operation Code (Op code) The leftmost field (4 bits). It determines the function of the instruction--What will it do? Operation Code Details The number of op code bits determines the number of different machine language instructions the c

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CPEN 4700 Exam Two Review (Answered)
100%
CPU's Three Major Components
An Arithmetic/Logic Unit (ALU) that performs computations on binary data.
Registers that are used to hold operands and/or memory addresses for operands
A control unit that controls and sequences the behavior of the other components (and
rest of system) based on programmed instructions
Von Neumann execution cycle
Design of a machine that carries out the steps. Involves: Fetching, decoding, executing,
and writing back instructions (FDEW)
Instruction Set Architecture (ISA)
The part of the computer architecture related to programming, including the native data
types, instructions, registers, addressing modes, memory architecture, interrupt and
exception handling, and external I/O.
Computer systems that share an ISA are compatible – meaning they can execute the
same programs
bit fields
Within a machine language instruction format of a given number of bits, the bits are
divided into this. Each part has a specific meaning to the control unit.

EX IMAGE (16 bits divided into a total of five bit fields)
Operation Code (Op code)
The leftmost field (4 bits). It determines the function of the instruction--What will it do?
Operation Code Details
The number of op code bits determines the number of different machine language
instructions the computer can have.In this case, four bits are used for the op code- thus
machine can have at most 2^4 = 16 different instructionsNeed more bits for op code for
more machine instructions
Register Selection Field
The Second and Fourth fields- they each determine which CPU registers will be used by
the instructions.

the number of bits determines the number of registers that the machine can have.

In this case, three bits are used to identify each register--therefore the machine can only
have 2^3 = 8 registers (at least of the type used by this instruction)
Mode Selection Field
The Third and fifth fields-they determine which addressing modes will be used by the
instruction to locate operands (In conjunction with the associated registers)

The number of bits determines the number of addressing modes that can be used to
identify operands for the machine instructions.•

,In this case, three bits are used to identify the mode - therefore the machine can only
have up to 2^3 =8 addressing modes for operands.
Instruction types --might be asked to give an example (can describe an action,
doesn't necessarily have to be a real instruction mnemonic), or match an example
with an instruction type
Data transfer, Computational, Control Transfer, I/O, System control, Miscellaneous
Registers
are used to holdoperands and/or memory addressesfor operands
Data Transfer Instruction Type
Copy data from one place to another within the machine (without doing any actual
computation)

Memory to register. Register to memory. Register to register. Memory to memory (in
some machines). Constant to register or memory
Computational Instructions type
Computational instructions produce a numerical result(s) based on the operands and
the operation performed on them.

1. Integer arithmetic (ex. addition, multiplication)

2. Real-number arithmetic (if needed for the intended applications) (ex. also addition,
multiplication)

3. Boolean logic (ex. AND, OR)

4. Bit shifting (moving bits left or right)

5. Comparisons (ex. <, >, =)
Control transfer instructions type
Those which have the potential to alter the normally sequential flow of instruction
execution (by altering the program counter or instruction pointer).
Input/Output instructions type
Those that enable the CPU to send or receive information to/from devices that connect
the computer to the outside world (human users or other machines)
System instructions Type
Typically those that facilitate control of the system environment by the OS - things we
generally don't want user/application programs to be able to do:
• Enabling/disabling interrupts
• Switching between privilege levels
• Cache and MMU control
• etc.
Miscellaneous instructions Type
nstructions that don't clearly fall into any of the above categories ca
*Given an instruction in assembly/binary and some information about it, show the
opposite and describe the operands and what it does
Find Example in 3.1 Slideshow

, The chosen operation is specified by...
the op code
Addressing Modes Definition
The means provided by the architecture to specify the value(s)and/or location(s) of
instruction operands.
Immediate Addressing -- OPERAND is in Instruction
Embed the operand itself (in binary) into the machine language instruction. In other
words, the instruction specifies explicitly what the operand is.
Primary advantage of immediate addressing is speed of operation.
Since the operand is embedded in the code – and since most architectures do notallow
for self-modifying code, it's good for constant operands only
Direct Addressing – OPERAND is in specified memory location (in instruction)
Uses a bit field within the instruction to specify which main memory location contains an
operand (and/or receives the result).

• Instead of op code followed by the operand (as in immediate addressing), we have op
code followed by the memory address of the operand
Register Addressing Example
Operand is in one of the CPU registers as specified in the instruction

Example (The bit field in blue tells us the operand is currently stored in R1 (00001))
Register Addressing
Uses a bit field within the instruction to specify which of the several CPU registers
contains an operand (and/or receives the result computed by the ALU).
Advantages:
1. Operands kept in registers can be accessed very quickly (registers are part of the
CPUcore and connect directly to the ALU).
2. We usually only need a small bit field to identify a CPU register (3 bits if there are
8registers, 4 bits if there are 16 registers, 5 bits if there are 32).
Advantages/Disadvantages of Register Addressing
Advantages:
1. Operands kept in registers can be accessed very quickly (registers are part of the
CPUcore and connect directly to the ALU).
2. We usually only need a small bit field to identify a CPU register (3 bits if there are
8registers, 4 bits if there are 16 registers, 5 bits if there are 32).
Disadvantages:
1. There are usually only a limited number of CPU registers (see previous bullet), and
someof them may be needed for other uses. (Only able to keep only the most frequently
usedvariables in registers.)
2. Registers are fine for scalar (individual) variables, but cannot generally hold large,
multi-element data structures such as strings or arrays. (In a modern 64-bit processor,
most ofthe general purpose registers are 64 bits.)
Advantages/Disadvantages of Direct addressing
Advantage:
most modern computers have very large amounts of RAM main memory, sowe can
have essentially as many direct-addressed variables as we like

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