CST 206 OPERATING SYSTEMS
MODULE 4
Memory Management: Concept of address spaces, Swapping, Contiguous memory
allocation, fixed and variable partitions, Segmentation, Paging. Virtual memory,
Demand paging, Page replacement algorithms.
MEMORY MANAGEMENT
• The memory is central to the operation of a modern computer system.
• Memory consists of a large array of bytes, each with its own address.
• The CPU fetches instructions from memory according to the value of the program counter.
• These instructions may cause additional loading from and storing to specific memory addresses.
• A typical instruction-execution cycle, for example, first fetches an instruction from memory.
• The instruction is then decoded and may cause operands to be fetched from memory.
• After the instruction has been executed on the operands, results may be stored back in memory.
• The memory unit sees only a stream of memory addresses; it does not know how they are generated
(by the instruction counter, indexing, indirection, literal addresses, and so on) or what they are for
(instructions or data).
Basic Hardware
• Main memory and the registers built into the processor itself are the only general-purpose storage
that the CPU can access directly.
• There are machine instructions that take memory addresses as arguments, but none that take disk
addresses.
• Therefore, any instructions in execution, and any data being used by the instructions, must be in one
of these direct-access storage devices. If the data are not in memory, they must be moved there
before the CPU can operate on them.
• Registers that are built into the CPU are generally accessible within one cycle of the CPU clock.
• But completing a memory access may take many cycles of the CPU clock. In such cases, the processor
normally needs to stall, since it does not have the data required to complete the instruction that it
is executing.
• This situation is intolerable because of the frequency of memory accesses. The remedy is to add fast
memory between the CPU and main memory, typically on the CPU chip for fast access.
CONCEPT OF ADDRESS SPACES
• To manage a cache built into the CPU, the hardware automatically speeds up memory access without
any operating-system control.
• Not only are we concerned with the relative speed of accessing physical memory, but we also must
ensure correct operation.
• For proper system operation we must protect the operating system from access by user processes.
• On multiuser systems, we must additionally protect user processes from one another. This
protection must be provided by the hardware because the operating system doesn’t usually
intervene between the CPU and its memory accesses. Hardware implements this protection in
several different ways.
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, CST 206 OPERATING SYSTEMS
1. Base and Limit Registers. We first need to make sure that each process has a separate memory space.
Separate per-process memory space protects the processes from each other and is fundamental to having
multiple processes loaded in memory for concurrent execution. To separate memory spaces, we need the
ability to determine the range of legal addresses that the process may access and to ensure that the process
can access only these legal addresses.
• We can provide this protection by using two registers, usually a base and a limit, as illustrated in
Figure 4.1. The base register holds the smallest legal physical memory address; the limit register
specifies the size of the range. For example, if the base register holds 300040 and the limit register
is 120900, then the program can legally access all addresses from 300040 through 420939
(inclusive).
• Protection of memory space is accomplished by having the CPU hardware compare every address
generated in user mode with the registers. Any attempt by a program executing in user mode to
access operating-system memory or other users’ memory results in a trap to the operating system,
which treats the attempt as a fatal error (Figure 4.2).
• This scheme prevents a user program from (accidentally or
deliberately) modifying the code or data structures of either the
operating system or other users. The base and limit registers can be
loaded only by the operating system, which uses a special privileged
instruction.
• A pair of base and limit registers define the logical address space.
• CPU must check every memory access generated in user mode to be
sure it is between base and limit for that user.
Figure 4.1 A base and a limit register define a logical address space
Hardware Address Protection
Figure 4.2 Hardware address protection with base and limit registers
Address Binding
Usually, a program resides on a disk as a binary executable file. To be executed, the program must be brought
into memory and placed within a process.
2
, CST 206 OPERATING SYSTEMS
Depending on the memory management in use, the process may be moved between disk and memory
during its execution. The processes on the disk that are waiting to be brought into memory for execution
form the input queue.
• Most systems allow a user process to reside in any part of the physical memory. Thus, although the
address space of the computer may start at 00000,the first address of the user process need not be
00000.
• Addresses in the source program are generally symbolic.
A compiler typically binds these symbolic addresses to relocatable addresses.
• The linkage editor or loader in turn binds the relocatable addresses to absolute addresses..
• Each binding is a mapping from one address space to another.
Classically, the binding of instructions and data to memory addresses can be done at any step along the
way:
1. Compile time. If you know at compile time where the process will reside in memory, then absolute
code can be generated. The MS-DOS programs are bound at compile time.
2. Load time. If it is not known at compile time where the process will reside in memory, then the
compiler must generate relocatable code. In this case, final binding is delayed until load time.
3. Execution time. If the process can be moved during its execution from one memory segment to
another, then binding must be delayed until run time. Special hardware must be available for this
scheme to work. Most general-purpose operating systems use this method.
Logical vs. Physical Address Space
✓ The concept of a logical address space that is bound to a separate physical address space is central
to proper memory management
o Logical address – generated by the CPU; also referred to as virtual address
o Physical address – address seen by the memory unit
✓ Logical and physical addresses are the same in compile-time and load-time address-binding
schemes; logical (virtual) and physical addresses differ in execution-time address-binding scheme
✓ Logical address space is the set of all logical addresses generated by a program
✓ Physical address space is the set of all physical addresses generated by a program
Dynamic relocation using a relocation register
Figure 4.3 Dynamic relocation using a relocation register.
3
MODULE 4
Memory Management: Concept of address spaces, Swapping, Contiguous memory
allocation, fixed and variable partitions, Segmentation, Paging. Virtual memory,
Demand paging, Page replacement algorithms.
MEMORY MANAGEMENT
• The memory is central to the operation of a modern computer system.
• Memory consists of a large array of bytes, each with its own address.
• The CPU fetches instructions from memory according to the value of the program counter.
• These instructions may cause additional loading from and storing to specific memory addresses.
• A typical instruction-execution cycle, for example, first fetches an instruction from memory.
• The instruction is then decoded and may cause operands to be fetched from memory.
• After the instruction has been executed on the operands, results may be stored back in memory.
• The memory unit sees only a stream of memory addresses; it does not know how they are generated
(by the instruction counter, indexing, indirection, literal addresses, and so on) or what they are for
(instructions or data).
Basic Hardware
• Main memory and the registers built into the processor itself are the only general-purpose storage
that the CPU can access directly.
• There are machine instructions that take memory addresses as arguments, but none that take disk
addresses.
• Therefore, any instructions in execution, and any data being used by the instructions, must be in one
of these direct-access storage devices. If the data are not in memory, they must be moved there
before the CPU can operate on them.
• Registers that are built into the CPU are generally accessible within one cycle of the CPU clock.
• But completing a memory access may take many cycles of the CPU clock. In such cases, the processor
normally needs to stall, since it does not have the data required to complete the instruction that it
is executing.
• This situation is intolerable because of the frequency of memory accesses. The remedy is to add fast
memory between the CPU and main memory, typically on the CPU chip for fast access.
CONCEPT OF ADDRESS SPACES
• To manage a cache built into the CPU, the hardware automatically speeds up memory access without
any operating-system control.
• Not only are we concerned with the relative speed of accessing physical memory, but we also must
ensure correct operation.
• For proper system operation we must protect the operating system from access by user processes.
• On multiuser systems, we must additionally protect user processes from one another. This
protection must be provided by the hardware because the operating system doesn’t usually
intervene between the CPU and its memory accesses. Hardware implements this protection in
several different ways.
1
, CST 206 OPERATING SYSTEMS
1. Base and Limit Registers. We first need to make sure that each process has a separate memory space.
Separate per-process memory space protects the processes from each other and is fundamental to having
multiple processes loaded in memory for concurrent execution. To separate memory spaces, we need the
ability to determine the range of legal addresses that the process may access and to ensure that the process
can access only these legal addresses.
• We can provide this protection by using two registers, usually a base and a limit, as illustrated in
Figure 4.1. The base register holds the smallest legal physical memory address; the limit register
specifies the size of the range. For example, if the base register holds 300040 and the limit register
is 120900, then the program can legally access all addresses from 300040 through 420939
(inclusive).
• Protection of memory space is accomplished by having the CPU hardware compare every address
generated in user mode with the registers. Any attempt by a program executing in user mode to
access operating-system memory or other users’ memory results in a trap to the operating system,
which treats the attempt as a fatal error (Figure 4.2).
• This scheme prevents a user program from (accidentally or
deliberately) modifying the code or data structures of either the
operating system or other users. The base and limit registers can be
loaded only by the operating system, which uses a special privileged
instruction.
• A pair of base and limit registers define the logical address space.
• CPU must check every memory access generated in user mode to be
sure it is between base and limit for that user.
Figure 4.1 A base and a limit register define a logical address space
Hardware Address Protection
Figure 4.2 Hardware address protection with base and limit registers
Address Binding
Usually, a program resides on a disk as a binary executable file. To be executed, the program must be brought
into memory and placed within a process.
2
, CST 206 OPERATING SYSTEMS
Depending on the memory management in use, the process may be moved between disk and memory
during its execution. The processes on the disk that are waiting to be brought into memory for execution
form the input queue.
• Most systems allow a user process to reside in any part of the physical memory. Thus, although the
address space of the computer may start at 00000,the first address of the user process need not be
00000.
• Addresses in the source program are generally symbolic.
A compiler typically binds these symbolic addresses to relocatable addresses.
• The linkage editor or loader in turn binds the relocatable addresses to absolute addresses..
• Each binding is a mapping from one address space to another.
Classically, the binding of instructions and data to memory addresses can be done at any step along the
way:
1. Compile time. If you know at compile time where the process will reside in memory, then absolute
code can be generated. The MS-DOS programs are bound at compile time.
2. Load time. If it is not known at compile time where the process will reside in memory, then the
compiler must generate relocatable code. In this case, final binding is delayed until load time.
3. Execution time. If the process can be moved during its execution from one memory segment to
another, then binding must be delayed until run time. Special hardware must be available for this
scheme to work. Most general-purpose operating systems use this method.
Logical vs. Physical Address Space
✓ The concept of a logical address space that is bound to a separate physical address space is central
to proper memory management
o Logical address – generated by the CPU; also referred to as virtual address
o Physical address – address seen by the memory unit
✓ Logical and physical addresses are the same in compile-time and load-time address-binding
schemes; logical (virtual) and physical addresses differ in execution-time address-binding scheme
✓ Logical address space is the set of all logical addresses generated by a program
✓ Physical address space is the set of all physical addresses generated by a program
Dynamic relocation using a relocation register
Figure 4.3 Dynamic relocation using a relocation register.
3
