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UNIT-I
COMBINATIONAL LOGIC
Combinational circuits-KMap-Analysis and Design Procedures-Binary Adder-Binary
Adder-Decimal Adder- Magnitude comparator-Decoder-Encoder-Multiplexers-
Demultiplexers
INTRODUCTION:
The digital system consists of two types of circuits, namely
(i) Combinational circuits
(ii) Sequential circuits
Combinational circuit consists of logic gates whose output at any time is
determined from the present combination of inputs. The logic gate is the most basic
building block of combinational logic. The logical function performed by a
combinational circuit is fully defined by a set of Boolean expressions.
Sequential logic circuit comprises both logic gates and the state of storage
elements such as flip-flops. As a consequence, the output of a sequential circuit
depends not only on present value of inputs but also on the past state of inputs.
In the previous chapter, we have discussed binary numbers, codes, Boolean
algebra and simplification of Boolean function and logic gates. In this chapter,
formulation and analysis of various systematic designs of combinational circuits will
be discussed.
A combinational circuit consists of input variables, logic gates, and output
variables. The logic gates accept signals from inputs and output signals are
generated according to the logic circuits employed in it. Binary information from the
given data transforms to desired output data in this process. Both input and output
are obviously the binary signals, i.e., both the input and output signals are of two
possible states, logic 1 and logic 0.
1
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,DOWNLOADED FROM STUCOR APP
Block diagram of a combinational logic circuit
For n number of input variables to a combinational circuit, 2n possible
combinations of binary input states are possible. For each possible combination,
there is one and only one possible output combination. A combinational logic circuit
can be described by m Boolean functions and each output can be expressed in terms
of n input variables.
DESIGN PROCEDURES:
Any combinational circuit can be designed by the following steps of design
procedure.
1. The problem is stated.
2. Identify the input and output variables.
3. The input and output variables are assigned letter symbols.
4. Construction of a truth table to meet input -output requirements.
5. Writing Boolean expressions for various output variables in terms of input
variables.
6. The simplified Boolean expression is obtained by any method of
minimization—algebraic method, Karnaugh map method, or tabulation
method.
7. A logic diagram is realized from the simplified Boolean expression using logic
gates.
The following guidelines should be followed while choosing the preferred
form for hardware implementation:
1. The implementation should have the minimum number of gates, with the
gates used having the minimum number of inputs.
2. There should be a minimum number of interconnections.
3. Limitation on the driving capability of the gates should not be ignored.
2
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,DOWNLOADED FROM STUCOR APP
Problems:
1. Design a combinational circuit with three inputs and one output. The output is 1
when the binary value of the inputs is less than 3. The output is 0 otherwise.
Solution:
Truth Table:
x y z F
0 0 0 1
0 0 1 1
0 1 0 1
0 1 1 0
1 0 0 0
1 0 1 0
1 1 0 0
1 1 1 0
K-map Simplification:
Logic Diagram:
The combinational circuit can be drawn as,
2. Design a combinational circuit with three inputs, x, y and z, and the three
outputs, A, B, and C. when the binary input is 0, 1, 2, or 3, the binary output is
3
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, DOWNLOADED FROM STUCOR APP
one greater than the input. When the binary input is 4, 5, 6, or 7, the binary
output is one less than the input.
Solution:
Truth Table:
Derive the truth table that defines the required relationship between inputs and
outputs.
x y z A B C
0 0 0 0 0 1
0 0 1 0 1 0
0 1 0 0 1 1
0 1 1 1 0 0
1 0 0 0 1 1
1 0 1 1 0 0
1 1 0 1 0 1
1 1 1 1 1 0
Obtain the simplified Boolean functions for each output as a function of the input
variables.
K-map for output A:
The simplified expression from the map is: A= xz+ xy+ yz
Logic Diagram:
K-map for output B:
4
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UNIT-I
COMBINATIONAL LOGIC
Combinational circuits-KMap-Analysis and Design Procedures-Binary Adder-Binary
Adder-Decimal Adder- Magnitude comparator-Decoder-Encoder-Multiplexers-
Demultiplexers
INTRODUCTION:
The digital system consists of two types of circuits, namely
(i) Combinational circuits
(ii) Sequential circuits
Combinational circuit consists of logic gates whose output at any time is
determined from the present combination of inputs. The logic gate is the most basic
building block of combinational logic. The logical function performed by a
combinational circuit is fully defined by a set of Boolean expressions.
Sequential logic circuit comprises both logic gates and the state of storage
elements such as flip-flops. As a consequence, the output of a sequential circuit
depends not only on present value of inputs but also on the past state of inputs.
In the previous chapter, we have discussed binary numbers, codes, Boolean
algebra and simplification of Boolean function and logic gates. In this chapter,
formulation and analysis of various systematic designs of combinational circuits will
be discussed.
A combinational circuit consists of input variables, logic gates, and output
variables. The logic gates accept signals from inputs and output signals are
generated according to the logic circuits employed in it. Binary information from the
given data transforms to desired output data in this process. Both input and output
are obviously the binary signals, i.e., both the input and output signals are of two
possible states, logic 1 and logic 0.
1
DOWNLOADED FROM STUCOR APP
,DOWNLOADED FROM STUCOR APP
Block diagram of a combinational logic circuit
For n number of input variables to a combinational circuit, 2n possible
combinations of binary input states are possible. For each possible combination,
there is one and only one possible output combination. A combinational logic circuit
can be described by m Boolean functions and each output can be expressed in terms
of n input variables.
DESIGN PROCEDURES:
Any combinational circuit can be designed by the following steps of design
procedure.
1. The problem is stated.
2. Identify the input and output variables.
3. The input and output variables are assigned letter symbols.
4. Construction of a truth table to meet input -output requirements.
5. Writing Boolean expressions for various output variables in terms of input
variables.
6. The simplified Boolean expression is obtained by any method of
minimization—algebraic method, Karnaugh map method, or tabulation
method.
7. A logic diagram is realized from the simplified Boolean expression using logic
gates.
The following guidelines should be followed while choosing the preferred
form for hardware implementation:
1. The implementation should have the minimum number of gates, with the
gates used having the minimum number of inputs.
2. There should be a minimum number of interconnections.
3. Limitation on the driving capability of the gates should not be ignored.
2
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,DOWNLOADED FROM STUCOR APP
Problems:
1. Design a combinational circuit with three inputs and one output. The output is 1
when the binary value of the inputs is less than 3. The output is 0 otherwise.
Solution:
Truth Table:
x y z F
0 0 0 1
0 0 1 1
0 1 0 1
0 1 1 0
1 0 0 0
1 0 1 0
1 1 0 0
1 1 1 0
K-map Simplification:
Logic Diagram:
The combinational circuit can be drawn as,
2. Design a combinational circuit with three inputs, x, y and z, and the three
outputs, A, B, and C. when the binary input is 0, 1, 2, or 3, the binary output is
3
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, DOWNLOADED FROM STUCOR APP
one greater than the input. When the binary input is 4, 5, 6, or 7, the binary
output is one less than the input.
Solution:
Truth Table:
Derive the truth table that defines the required relationship between inputs and
outputs.
x y z A B C
0 0 0 0 0 1
0 0 1 0 1 0
0 1 0 0 1 1
0 1 1 1 0 0
1 0 0 0 1 1
1 0 1 1 0 0
1 1 0 1 0 1
1 1 1 1 1 0
Obtain the simplified Boolean functions for each output as a function of the input
variables.
K-map for output A:
The simplified expression from the map is: A= xz+ xy+ yz
Logic Diagram:
K-map for output B:
4
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