COMPUTER ARCHITECTURE UNIT:-3
Pipelining in Computer Architecture is a technique used to improve the throughput of a processor by
overlapping the execution of multiple instructions. Instead of completing one instruction before starting the
next, pipelining divides the instruction cycle into stages (such as Fetch, Decode, Execute, Memory, and
Write-back), allowing different instructions to be processed simultaneously at different stages.
*Definition:
Pipelining is a technique where multiple instruction stages are overlapped to increase CPU throughput. Each
instruction is divided into smaller stages, and while one instruction is in one stage, another can be processed
in another stage.
*Structure or Stages in Pipelining:
A typical pipelined processor has the following stages:
1. Fetch (IF): The instruction is fetched from memory.
2. Decode (ID): The instruction is decoded to determine what action needs to be performed.
3. Execute (EX): The processor performs the operation specified by the instruction (e.g., arithmetic or
logic operations).
4. Memory Access (MEM): For load/store instructions, data is read from or written to memory.
5. Write-back (WB): The result is written back to the register file.
*Key Points of the Structure/stages:
• Stages: Each stage performs a specific task in the instruction processing cycle, allowing instructions
to be processed in parallel.
• Pipelined Flow: Multiple instructions can be in different stages at the same time, leading to higher
throughput.
• Clock Cycles: Each stage typically takes one clock cycle to complete, with the pipeline moving
instructions from one stage to the next.
, *Features of Pipelining:
• Multiple Stages: Divides instruction execution into stages like Fetch, Decode, Execute, Memory,
and Write-back.
• Overlapping Execution: Different stages handle different instructions simultaneously.
• Throughput Improvement: Allows more instructions to be processed in the same time.
*Advantages of Pipelining:
1. Increased Throughput: More instructions are processed per clock cycle.
2. Efficient Resource Use: Continuous use of CPU resources without idle time.
3. Higher Clock Speed: Smaller, more manageable stages can run at higher speeds.
*Disadvantages of Pipelining:
1. Increased Complexity: More complex design and control logic.
2. Pipeline Hazards: Issues like data, control, and structural hazards can cause delays.
3. Stalls: Pipeline stalls (delays) occur due to hazards, reducing efficiency.
4. Diminishing Returns: Longer pipelines may lead to more complexity without proportional
performance gains.
#Principle of pipelining: The principles of pipelining in computer architecture can be summarized in
the following key points:
1. Instruction Overlap: Multiple instructions are processed in parallel at different stages of execution.
2. Stage Division: The instruction cycle is divided into distinct stages (e.g., fetch, decode, execute,
memory access, write-back).
3. Increased Throughput: By overlapping the stages, pipelining increases the number of instructions
processed in a given time period.
4. Parallelism: Multiple instructions can be in different stages of the pipeline simultaneously,
improving overall performance.
5. Efficiency: Pipelining ensures that all parts of the processor are used efficiently by minimizing idle
times.
6. Latency Impact: While throughput increases, individual instruction latency may remain the same, as
each instruction still goes through the entire pipeline.
7. Pipeline Hazards: Issues like data hazards, control hazards, and structural hazards can occur,
requiring techniques to resolve or minimize them.
8. Clock Cycle Optimization: The pipeline typically uses one clock cycle per stage, allowing faster
execution compared to non-pipelined processors.
#Classification of pipelining processing: Pipelining in computer architecture can be classified based
on different criteria such as the number of pipeline stages, type of operations, or the level at which the
pipelining is implemented. Here are the common classifications of pipelining:
1. Based on Type of Operations: (Main one)
Pipelining in Computer Architecture is a technique used to improve the throughput of a processor by
overlapping the execution of multiple instructions. Instead of completing one instruction before starting the
next, pipelining divides the instruction cycle into stages (such as Fetch, Decode, Execute, Memory, and
Write-back), allowing different instructions to be processed simultaneously at different stages.
*Definition:
Pipelining is a technique where multiple instruction stages are overlapped to increase CPU throughput. Each
instruction is divided into smaller stages, and while one instruction is in one stage, another can be processed
in another stage.
*Structure or Stages in Pipelining:
A typical pipelined processor has the following stages:
1. Fetch (IF): The instruction is fetched from memory.
2. Decode (ID): The instruction is decoded to determine what action needs to be performed.
3. Execute (EX): The processor performs the operation specified by the instruction (e.g., arithmetic or
logic operations).
4. Memory Access (MEM): For load/store instructions, data is read from or written to memory.
5. Write-back (WB): The result is written back to the register file.
*Key Points of the Structure/stages:
• Stages: Each stage performs a specific task in the instruction processing cycle, allowing instructions
to be processed in parallel.
• Pipelined Flow: Multiple instructions can be in different stages at the same time, leading to higher
throughput.
• Clock Cycles: Each stage typically takes one clock cycle to complete, with the pipeline moving
instructions from one stage to the next.
, *Features of Pipelining:
• Multiple Stages: Divides instruction execution into stages like Fetch, Decode, Execute, Memory,
and Write-back.
• Overlapping Execution: Different stages handle different instructions simultaneously.
• Throughput Improvement: Allows more instructions to be processed in the same time.
*Advantages of Pipelining:
1. Increased Throughput: More instructions are processed per clock cycle.
2. Efficient Resource Use: Continuous use of CPU resources without idle time.
3. Higher Clock Speed: Smaller, more manageable stages can run at higher speeds.
*Disadvantages of Pipelining:
1. Increased Complexity: More complex design and control logic.
2. Pipeline Hazards: Issues like data, control, and structural hazards can cause delays.
3. Stalls: Pipeline stalls (delays) occur due to hazards, reducing efficiency.
4. Diminishing Returns: Longer pipelines may lead to more complexity without proportional
performance gains.
#Principle of pipelining: The principles of pipelining in computer architecture can be summarized in
the following key points:
1. Instruction Overlap: Multiple instructions are processed in parallel at different stages of execution.
2. Stage Division: The instruction cycle is divided into distinct stages (e.g., fetch, decode, execute,
memory access, write-back).
3. Increased Throughput: By overlapping the stages, pipelining increases the number of instructions
processed in a given time period.
4. Parallelism: Multiple instructions can be in different stages of the pipeline simultaneously,
improving overall performance.
5. Efficiency: Pipelining ensures that all parts of the processor are used efficiently by minimizing idle
times.
6. Latency Impact: While throughput increases, individual instruction latency may remain the same, as
each instruction still goes through the entire pipeline.
7. Pipeline Hazards: Issues like data hazards, control hazards, and structural hazards can occur,
requiring techniques to resolve or minimize them.
8. Clock Cycle Optimization: The pipeline typically uses one clock cycle per stage, allowing faster
execution compared to non-pipelined processors.
#Classification of pipelining processing: Pipelining in computer architecture can be classified based
on different criteria such as the number of pipeline stages, type of operations, or the level at which the
pipelining is implemented. Here are the common classifications of pipelining:
1. Based on Type of Operations: (Main one)
