ECEN 350 Final Study 2025 Review Questions And Answers

ECEN 350 Final Study 2025 Review Questions And Answers 1. (True or False) The following is the complete RTL description of the "AND" instruction: R[rd] = R[rs] & R[rt];: False 2. Adding two ports to an SRAM means increasing each cell by _____ transis tors. (how many?): 4 3. Fetch, _______ and Execute are the three phases of an instructions life-cy cle.: decode 4. For all D-Type instructions, Read Data 2 is connected to the ALU.: False 5. Hardware that is not in use for a given instruction (on the unified hardware) is removed until needed to save power.: False 6. RTL defines the actions of an instruction in terms of operations performed on registers, with the outcome being placed in another register.: True 7. RTL stands for ______________________.: register transfer language 8. The B instruction does not require the registerfile at all.: True 9. The fastest path through the logic determines its critical path and hence its clock frequency.: False 10. The register file must have three ports (two read and one write) in order to directly support D-Type instructions.: False 11. There are many different possible implementations of a particular ISA in hardware.: True 12. _______ are use