Academic Year 2024 - 2025 Regulation - 2023
DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
SUBJECT CODE: 23EC4401 SEM:IV
SUBJECT NAME: Linear Integrated Circuits YEAR: II
UNIT I - FABRICATION OF ICs (100% Theoretical)
Introduction, IC classification, IC chip size and circuit complexity, Fundamentals
of monolithic IC technology, Basic Planar Processes, Fabrication of FET, Thin and
Thick Film Technology.
This unit deals with fundamental of ICs, the different processing techniques that are
needed for IC, transistor and diode fabrication are listed. A small procedure of the fabrication
process is also explained. In a monolithic IC, all the circuit components are fabricated into or
on top of a block of silicon which is referred to as a chip or die. Metallization patterns are
required to make interconnections between the components present inside the chip. It must
also be noted that the individual components will not be separable from the circuit.
Part A (2 Marks)
Introduction, IC classification chip size and circuit complexity
1. Define Integrated Circuits (IC). K1
2. List the classification of ICs. K2
3. List the number of gates/chips and transistors/chip required for LSI, VLSI, ULSI K2
and GSI integrations.
4. Compare Monolithic and Hybrid ICs. K2
5. Organize the four layers of an IC. K1
6. Mention the basic processes involved in fabricating ICs using planar technology. K1
7. Give the advantages of integrated circuits over discrete circuits.? K2
Fundamentals of monolithic IC technology
8. List out the steps used in the preparation of Si – wafers. K2
9. Explain the basic chemical reaction in the Epitaxial growth process of pure K2
silicon.
Basic Planar Processes
10. Draw the model for silicon epitaxial growth. K2
11. What is the need for the process of oxidation? K2
12. List the main steps involved in the planar process. K1
13. Summarize the diffusion process. K2
14. Define Photolithography. K1
15. Discuss the two processes involved in Photolithography. K2
16. What are an undesirable by-product of the isolation process? K2
17. Illustrate the dielectric isolation technique. K1
18. List the three different IC package configurations. K1
19. Compare the performance of n-p-n and p-n-p transistors with respect to IC K2
fabrication.
20. Tell about the four different integrated resistors used in IC fabrication. K1
21. Write a note on two types of Integrated capacitors. K1
22. Draw the equivalent circuit of junction type IC capacitor. K2
Fabrication of FET
23. Write a note on integrated inductors. K1
1
,Academic Year 2024 - 2025 Regulation - 2023
24. Infer the use of Silicon Nitrate (Si3N4) rather than SiO2 in the fabrication of K2
FET.
25. Explain the Fabrication of polysilicon gate enhancement NMOS. K2
26. Stress the importance of polysilicon gate in fabrication of MOSFET. K2
Thin and Thick Film Technology
27. Define thin film technology. K1
28. Recall the plating techniques utilized in thin film technology. K1
29. List the various methods in use for deposition of thin film. K2
30. Outline the Surface Mount Technology (SMT). K2
Part – B (16 marks)
1. (i). Describe on the fundamentals of fundamentals of monolithic IC (8) K2
technology.
(ii). Summarize the IC based on applications, device used and IC (8) K2
complexity.
2. Illustrate the basic process used in silicon planar technology with neat (16) K2
diagram.
3. With respect to BJT based circuit given below, explain the various steps to (16) K2
implement the circuit into a monolithic IC.
4. Summarize the following :
(i)Monolithic transistors (10) K2
(ii)Monolithic Diodes (6) K2
5. (i).Demonstrate the integrated resistors and capacitors in IC fabrication. (8) K2
(ii).Identify the step that can produce microscopically small circuit and (8) K3
devices pattern on Si-wafers and explain the same in detail.
6. (i). Design the MOSFET fabrication process, with the utilization of (10) K3
Si3N4 and Polysilicon gate.
(ii). Model the CMOS circuit with the fabrication of NMOS and PMOS (6) K3
enhancement devices on the same silicon chip.
7. (i).Discuss the difference between thin film and thick film technology. (6) K2
(ii). Explain the any two methods of deposition of thin film technology in (10) K2
detail.
8. (i).Describe in detail the thick film technology along with Surface Mount (10) K2
Technology (SMT).
(ii).With the utilization of the idea from the IC fabrication process, write (6) K3
short notes on the various recent semiconductor technology trends that can
be applied in the IC fabrication.
2
,Academic Year 2024 - 2025 Regulation - 2023
DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
SUBJECT CODE: 23EC4401 SEM:IV
SUBJECT NAME: Linear Integrated Circuits YEAR: II
UNIT I - FABRICATION OF ICs
(100% Theoretical)
Introduction, IC classification, IC chip size and circuit complexity, Fundamentals of monolithic IC
technology, Basic Planar Processes, Fabrication of FET, Thin and Thick Film Technology.
Part A (2 Marks)Part – B (16 marks)
3. With respect to BJT based circuit given below, explain the various steps to implement the
circuit into a monolithic IC. (16)
A monolithic circuit, literally speaking, means a circuit fabricated, form a single stone or a
single crystal. The origin of the word ‘monolithic’ is from the Greek word monos meaning ‘single‘
and lithos meaning ‘stone’. So monolithic integrated circuits are, in fact, made in a single piece of
crystal silicon. (2)
The most significant advantage of integrated circuit of reducing the cost of production of
electronic circuits due to batch production can be easily visualized by a simple example. A standard
cm diameter wafer can be divided into approximately 8000 rectangular chips of side 1mm. Each IC
chip may contain as few tens of components to several thousand components. And if 10 such
wafers are processed in one batch we can make 80,000 ICs simultaneously .many chips so
produced will be faulty due to imperfection in the manufacturing process. Even if the yield
(percentage of fault free chips/wafer) is only 20 percent, it can be seen that 16,000 good chips are
produced in a single batch. (4)
The fabrication of discrete devices such as transistor, diode or an integrated circuit in
general can be done by the same technology. The various process usually take place through a
single plane and therefore, the technology is refers to as planar technology. (2)
(3)
Cross sectional view of the circuit when transformed into monolithic form
1
, Academic Year 2024 - 2025 Regulation - 2023
An IC in general, consists of four distinct layers as follows :
Table.Layers of an IC
LAYER NO. 1 is a p-type silicon substrate upon which the integrated c ircuit is fabricated.
(~400µm)
LAYER NO. 2 is a thin n-type material grown as a single crystal extension of the substrate
(~5-25µm) using epitaxial deposition technique . All active and passive components
are fabricated within this layer using selective diffusion of impurities.
LAYER NO. 3 is a very thin siO2 layer for preventing diffusion of impurities wherever not
(0.02-2µm) required using photo lithographic technique.
LAYER NO. 4 is an aluminium – layer used for obtaining interconnection between
(~µm) components.
(5)
5. (ii).Identify the step that can produce microscopically small circuit and devices pattern on Si-
wafers and explain the same in detail. (8)
The following steps are used in the preparation of Si-wafers
1. Crystal growth and doping
2. Ingot trimming and grinding
3. Ingot slicing
4. Wafer polishing and etching
5. Wafer cleaning
The starting material for crystal growth is highly purifies (99.99999) polycrystalline silicon.
The czochralski crystal growth is the most often used for producing single crystal silicon ingots.
The polycrystalline silicon together with an appropriate amount of dopant is put in a quartz crucible
and is then placed in a furnace. The material is then heated to a temperature in excess of the silicon
melting point of 1420°C.
A small single crystal rod of silicon called a seed crystal rod of silicon called a seed crystal
is then dipped into the silicon-melt and slowly pulled out as shown in fig. As the seed crystal is
pulled out of the melt; it brings with it a solidified mass of silicon with the same crystalline
structure as that of seed crystal. During the crystal pulling process, the seed crystal and the crucible
are rotated in opposite directions in order to produce ingots of circular cross-section. The diameter
of about 10 to 15 cm is common and ingot length is generally of the order of 100 cm. (3)
Next the top and bottom portions of the ingot are cut off and the ingots surface is ground to
produce exact diameter (D=10, 1025,15cm). The ingot is also ground flat slightly along the length
to get a reference plane. The ingot is then sliced using a stainless steel saw blade with industrial
diamonds embedded into the inner diameter cutting edge. This produce circular wafers or slices as
shown in fig.
Czochralski Crystal Growth (2)
2
DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
SUBJECT CODE: 23EC4401 SEM:IV
SUBJECT NAME: Linear Integrated Circuits YEAR: II
UNIT I - FABRICATION OF ICs (100% Theoretical)
Introduction, IC classification, IC chip size and circuit complexity, Fundamentals
of monolithic IC technology, Basic Planar Processes, Fabrication of FET, Thin and
Thick Film Technology.
This unit deals with fundamental of ICs, the different processing techniques that are
needed for IC, transistor and diode fabrication are listed. A small procedure of the fabrication
process is also explained. In a monolithic IC, all the circuit components are fabricated into or
on top of a block of silicon which is referred to as a chip or die. Metallization patterns are
required to make interconnections between the components present inside the chip. It must
also be noted that the individual components will not be separable from the circuit.
Part A (2 Marks)
Introduction, IC classification chip size and circuit complexity
1. Define Integrated Circuits (IC). K1
2. List the classification of ICs. K2
3. List the number of gates/chips and transistors/chip required for LSI, VLSI, ULSI K2
and GSI integrations.
4. Compare Monolithic and Hybrid ICs. K2
5. Organize the four layers of an IC. K1
6. Mention the basic processes involved in fabricating ICs using planar technology. K1
7. Give the advantages of integrated circuits over discrete circuits.? K2
Fundamentals of monolithic IC technology
8. List out the steps used in the preparation of Si – wafers. K2
9. Explain the basic chemical reaction in the Epitaxial growth process of pure K2
silicon.
Basic Planar Processes
10. Draw the model for silicon epitaxial growth. K2
11. What is the need for the process of oxidation? K2
12. List the main steps involved in the planar process. K1
13. Summarize the diffusion process. K2
14. Define Photolithography. K1
15. Discuss the two processes involved in Photolithography. K2
16. What are an undesirable by-product of the isolation process? K2
17. Illustrate the dielectric isolation technique. K1
18. List the three different IC package configurations. K1
19. Compare the performance of n-p-n and p-n-p transistors with respect to IC K2
fabrication.
20. Tell about the four different integrated resistors used in IC fabrication. K1
21. Write a note on two types of Integrated capacitors. K1
22. Draw the equivalent circuit of junction type IC capacitor. K2
Fabrication of FET
23. Write a note on integrated inductors. K1
1
,Academic Year 2024 - 2025 Regulation - 2023
24. Infer the use of Silicon Nitrate (Si3N4) rather than SiO2 in the fabrication of K2
FET.
25. Explain the Fabrication of polysilicon gate enhancement NMOS. K2
26. Stress the importance of polysilicon gate in fabrication of MOSFET. K2
Thin and Thick Film Technology
27. Define thin film technology. K1
28. Recall the plating techniques utilized in thin film technology. K1
29. List the various methods in use for deposition of thin film. K2
30. Outline the Surface Mount Technology (SMT). K2
Part – B (16 marks)
1. (i). Describe on the fundamentals of fundamentals of monolithic IC (8) K2
technology.
(ii). Summarize the IC based on applications, device used and IC (8) K2
complexity.
2. Illustrate the basic process used in silicon planar technology with neat (16) K2
diagram.
3. With respect to BJT based circuit given below, explain the various steps to (16) K2
implement the circuit into a monolithic IC.
4. Summarize the following :
(i)Monolithic transistors (10) K2
(ii)Monolithic Diodes (6) K2
5. (i).Demonstrate the integrated resistors and capacitors in IC fabrication. (8) K2
(ii).Identify the step that can produce microscopically small circuit and (8) K3
devices pattern on Si-wafers and explain the same in detail.
6. (i). Design the MOSFET fabrication process, with the utilization of (10) K3
Si3N4 and Polysilicon gate.
(ii). Model the CMOS circuit with the fabrication of NMOS and PMOS (6) K3
enhancement devices on the same silicon chip.
7. (i).Discuss the difference between thin film and thick film technology. (6) K2
(ii). Explain the any two methods of deposition of thin film technology in (10) K2
detail.
8. (i).Describe in detail the thick film technology along with Surface Mount (10) K2
Technology (SMT).
(ii).With the utilization of the idea from the IC fabrication process, write (6) K3
short notes on the various recent semiconductor technology trends that can
be applied in the IC fabrication.
2
,Academic Year 2024 - 2025 Regulation - 2023
DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
SUBJECT CODE: 23EC4401 SEM:IV
SUBJECT NAME: Linear Integrated Circuits YEAR: II
UNIT I - FABRICATION OF ICs
(100% Theoretical)
Introduction, IC classification, IC chip size and circuit complexity, Fundamentals of monolithic IC
technology, Basic Planar Processes, Fabrication of FET, Thin and Thick Film Technology.
Part A (2 Marks)Part – B (16 marks)
3. With respect to BJT based circuit given below, explain the various steps to implement the
circuit into a monolithic IC. (16)
A monolithic circuit, literally speaking, means a circuit fabricated, form a single stone or a
single crystal. The origin of the word ‘monolithic’ is from the Greek word monos meaning ‘single‘
and lithos meaning ‘stone’. So monolithic integrated circuits are, in fact, made in a single piece of
crystal silicon. (2)
The most significant advantage of integrated circuit of reducing the cost of production of
electronic circuits due to batch production can be easily visualized by a simple example. A standard
cm diameter wafer can be divided into approximately 8000 rectangular chips of side 1mm. Each IC
chip may contain as few tens of components to several thousand components. And if 10 such
wafers are processed in one batch we can make 80,000 ICs simultaneously .many chips so
produced will be faulty due to imperfection in the manufacturing process. Even if the yield
(percentage of fault free chips/wafer) is only 20 percent, it can be seen that 16,000 good chips are
produced in a single batch. (4)
The fabrication of discrete devices such as transistor, diode or an integrated circuit in
general can be done by the same technology. The various process usually take place through a
single plane and therefore, the technology is refers to as planar technology. (2)
(3)
Cross sectional view of the circuit when transformed into monolithic form
1
, Academic Year 2024 - 2025 Regulation - 2023
An IC in general, consists of four distinct layers as follows :
Table.Layers of an IC
LAYER NO. 1 is a p-type silicon substrate upon which the integrated c ircuit is fabricated.
(~400µm)
LAYER NO. 2 is a thin n-type material grown as a single crystal extension of the substrate
(~5-25µm) using epitaxial deposition technique . All active and passive components
are fabricated within this layer using selective diffusion of impurities.
LAYER NO. 3 is a very thin siO2 layer for preventing diffusion of impurities wherever not
(0.02-2µm) required using photo lithographic technique.
LAYER NO. 4 is an aluminium – layer used for obtaining interconnection between
(~µm) components.
(5)
5. (ii).Identify the step that can produce microscopically small circuit and devices pattern on Si-
wafers and explain the same in detail. (8)
The following steps are used in the preparation of Si-wafers
1. Crystal growth and doping
2. Ingot trimming and grinding
3. Ingot slicing
4. Wafer polishing and etching
5. Wafer cleaning
The starting material for crystal growth is highly purifies (99.99999) polycrystalline silicon.
The czochralski crystal growth is the most often used for producing single crystal silicon ingots.
The polycrystalline silicon together with an appropriate amount of dopant is put in a quartz crucible
and is then placed in a furnace. The material is then heated to a temperature in excess of the silicon
melting point of 1420°C.
A small single crystal rod of silicon called a seed crystal rod of silicon called a seed crystal
is then dipped into the silicon-melt and slowly pulled out as shown in fig. As the seed crystal is
pulled out of the melt; it brings with it a solidified mass of silicon with the same crystalline
structure as that of seed crystal. During the crystal pulling process, the seed crystal and the crucible
are rotated in opposite directions in order to produce ingots of circular cross-section. The diameter
of about 10 to 15 cm is common and ingot length is generally of the order of 100 cm. (3)
Next the top and bottom portions of the ingot are cut off and the ingots surface is ground to
produce exact diameter (D=10, 1025,15cm). The ingot is also ground flat slightly along the length
to get a reference plane. The ingot is then sliced using a stainless steel saw blade with industrial
diamonds embedded into the inner diameter cutting edge. This produce circular wafers or slices as
shown in fig.
Czochralski Crystal Growth (2)
2
