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UNIT I
COMBINATIONAL LOGIC
Combinational Circuits – Analysis and Design Procedures - Binary Adder- Subtractor -Decimal Adder -
Binary Multiplier - Magnitude Comparator - Decoders – Encoders – Multiplexers - Introduction to HDL –
HDL Models of Combinational circuits.
COMBINATIONAL CIRCUITS
A combinational circuit consists of logic gates whose outputs at any time are determined from only the
present combination of inputs.
A combinational circuit performs an operation that can be specified logically by a set of Boolean
n
functions.
e.i
fre
Sequential circuits:
Sequential circuits employ storage elements in addition to logic gates. Their outputs are a function of
the inputs and the state of the storage elements.
Because the state of the storage elements is a function of previous inputs, the outputs of a sequential
circuit depend not only on present values of inputs, but also on past inputs, and the circuit behavior must
tes
be specified by a time sequence of inputs and internal states.
ANALYSIS PROCEDURE
Explain the analysis procedure. Analyze the combinational circuit the following logic diagram.
No
(May
2015)
The analys is o f a co mbinat ional circuit requir es t hat we det er mine t he funct io n t hat
t he cir cuit implement s.
w.
The analys is can be per for med manually by finding t he Boolean funct io ns or trut h
t able or by using a co mput er simulat io n program.
The first st ep in t he analys is is t o make t hat t he given circuit is co mbinat ional o r
sequent ial.
ww
Once t he logic diagram is ver ified t o be combinat ional, one can proceed t o obt ain t he
out put Boolean funct io ns or t he t rut h t able.
To obtain the output Boolean functions from a logic diagram,
Label all gate outputs that are a function of input variables with arbitrary symbols or names.
Determine the Boolean functions for each gate output.
Label the gates that are a function of input variables and previously labeled gates with other
arbitrary symbols or names. Find the Boolean functions for these gates.
Repeat the process in step 2 until the outputs of the circuit are obtained.
By repeated substitution of previously defined functions, obtain the output Boolean functions in
terms of input variables.
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Logic diagramforanalysis example
n
e.i
fre
The Boolean functions for the above outputs are,
tes
No
Proceed to obtain the truth table for the outputs of those gates which are a function of previously
defined values until the columns for all outputs are determined.
w.
ww
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DESIGNPROCEDURE
Explain the procedure involved in designing combinational circuits.
The design of combinational circuits starts from the specification of the design objective and culminates
in a logic circuit diagram or a set of Boolean functions from which the logic diagram can be obtained.
The procedure involved involves the following steps,
From the specifications of the circuit, determine the required number of inputs and outputs and assign a
symbol to each.
Derive the truth table that defines the required relationship between inputs and outputs.
Obtain the simplified Boolean functions for each output as a function of the input variables.
Draw the logic diagram and verify the correctness of the design.
n
**************************************************
e.i
CIRCUITS FOR ARITHMETIC OPERATIONS
Half adder:
Construct a half adder with necessary diagrams. (Nov-06,May- 07)
SUM and CARRY.
fre
A half-adder is an arithmetic circuit block that can be used to add two bits and produce two outputs
The Boolean expressions for the SUM and CARRY outputs are given by the equations
tes
Truth Table:
No
w.
Logic Diagram: Half adder using NAND gate:
ww
*************************
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Full adder:
Design a full adder using NAND and NOR gates respectively. (Nov -10)
A Full-adder is an arithmetic circuit block that can be used to add three bits and produce two outputs
SUM and CARRY.
The Boolean expressions for the SUM and CARRY outputs are given by the equations
Truth table:
n
e.i
fre
tes
Karnaugh map:
No
K-Map for Sum K-Map for Carry
w.
The simplified Boolean expressions of the outputs are
S = X′A′B + X′AB′ + XA′B′ + XAB
C = AB + BX + AX
ww
Logic diagram:
Page 4
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UNIT I
COMBINATIONAL LOGIC
Combinational Circuits – Analysis and Design Procedures - Binary Adder- Subtractor -Decimal Adder -
Binary Multiplier - Magnitude Comparator - Decoders – Encoders – Multiplexers - Introduction to HDL –
HDL Models of Combinational circuits.
COMBINATIONAL CIRCUITS
A combinational circuit consists of logic gates whose outputs at any time are determined from only the
present combination of inputs.
A combinational circuit performs an operation that can be specified logically by a set of Boolean
n
functions.
e.i
fre
Sequential circuits:
Sequential circuits employ storage elements in addition to logic gates. Their outputs are a function of
the inputs and the state of the storage elements.
Because the state of the storage elements is a function of previous inputs, the outputs of a sequential
circuit depend not only on present values of inputs, but also on past inputs, and the circuit behavior must
tes
be specified by a time sequence of inputs and internal states.
ANALYSIS PROCEDURE
Explain the analysis procedure. Analyze the combinational circuit the following logic diagram.
No
(May
2015)
The analys is o f a co mbinat ional circuit requir es t hat we det er mine t he funct io n t hat
t he cir cuit implement s.
w.
The analys is can be per for med manually by finding t he Boolean funct io ns or trut h
t able or by using a co mput er simulat io n program.
The first st ep in t he analys is is t o make t hat t he given circuit is co mbinat ional o r
sequent ial.
ww
Once t he logic diagram is ver ified t o be combinat ional, one can proceed t o obt ain t he
out put Boolean funct io ns or t he t rut h t able.
To obtain the output Boolean functions from a logic diagram,
Label all gate outputs that are a function of input variables with arbitrary symbols or names.
Determine the Boolean functions for each gate output.
Label the gates that are a function of input variables and previously labeled gates with other
arbitrary symbols or names. Find the Boolean functions for these gates.
Repeat the process in step 2 until the outputs of the circuit are obtained.
By repeated substitution of previously defined functions, obtain the output Boolean functions in
terms of input variables.
Page 1
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Logic diagramforanalysis example
n
e.i
fre
The Boolean functions for the above outputs are,
tes
No
Proceed to obtain the truth table for the outputs of those gates which are a function of previously
defined values until the columns for all outputs are determined.
w.
ww
Page 2
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DESIGNPROCEDURE
Explain the procedure involved in designing combinational circuits.
The design of combinational circuits starts from the specification of the design objective and culminates
in a logic circuit diagram or a set of Boolean functions from which the logic diagram can be obtained.
The procedure involved involves the following steps,
From the specifications of the circuit, determine the required number of inputs and outputs and assign a
symbol to each.
Derive the truth table that defines the required relationship between inputs and outputs.
Obtain the simplified Boolean functions for each output as a function of the input variables.
Draw the logic diagram and verify the correctness of the design.
n
**************************************************
e.i
CIRCUITS FOR ARITHMETIC OPERATIONS
Half adder:
Construct a half adder with necessary diagrams. (Nov-06,May- 07)
SUM and CARRY.
fre
A half-adder is an arithmetic circuit block that can be used to add two bits and produce two outputs
The Boolean expressions for the SUM and CARRY outputs are given by the equations
tes
Truth Table:
No
w.
Logic Diagram: Half adder using NAND gate:
ww
*************************
Page 3
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Full adder:
Design a full adder using NAND and NOR gates respectively. (Nov -10)
A Full-adder is an arithmetic circuit block that can be used to add three bits and produce two outputs
SUM and CARRY.
The Boolean expressions for the SUM and CARRY outputs are given by the equations
Truth table:
n
e.i
fre
tes
Karnaugh map:
No
K-Map for Sum K-Map for Carry
w.
The simplified Boolean expressions of the outputs are
S = X′A′B + X′AB′ + XA′B′ + XAB
C = AB + BX + AX
ww
Logic diagram:
Page 4
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