21EC603- CMOS VLSI DESIGN
Class: III ECE
Academic Year:2023-2024 (EVEN Sem)
Module I: Issues and Challenges in Digital IC Design
Course handling faculty: Dr. M. Priyatharishini
, STATIC CMOS
• Designers accustomed to AND & OR functions
must learn to think in terms of NAND and NOR
to take advantage of static CMOS.
• In manual circuit design, this is often done
through bubble pushing.
• Compound gates are particularly useful to
perform complex functions with relatively low
logical efforts.
• In processes with multiple threshold voltages,
multiple flavors of gates can be constructed
with different speed/leakage power trade-offs
, Example 1
module mux(input S, D0, D1,
output Y);
assign Y = S ? D1 : D0;
endmodule
Sketch a design using AND, OR, and NOT gates.
D0
S
Y
D1
S
10: Combinational Circuits 3
Class: III ECE
Academic Year:2023-2024 (EVEN Sem)
Module I: Issues and Challenges in Digital IC Design
Course handling faculty: Dr. M. Priyatharishini
, STATIC CMOS
• Designers accustomed to AND & OR functions
must learn to think in terms of NAND and NOR
to take advantage of static CMOS.
• In manual circuit design, this is often done
through bubble pushing.
• Compound gates are particularly useful to
perform complex functions with relatively low
logical efforts.
• In processes with multiple threshold voltages,
multiple flavors of gates can be constructed
with different speed/leakage power trade-offs
, Example 1
module mux(input S, D0, D1,
output Y);
assign Y = S ? D1 : D0;
endmodule
Sketch a design using AND, OR, and NOT gates.
D0
S
Y
D1
S
10: Combinational Circuits 3