Lab 1
MOSFET SWITCHES
Charles Nwokotubo
100953861
Maryam Kaka
Lab Section: Friday B4
Due date: 23- Jan – 2016
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, Analysis
1.2 NMOS Transistors
1.2.1 Transistor Pulling Down
Q1. a)
Vout(min) vs R
0.8
0.7
0.6
0.5
0.4
Vout (min)(V)
0.3
0.2
0.1
0
0 200 400 600 800 1000 1200
R (kOhms)
FIGURE 1: Plot of Vout(min) against R for NMOS1
b) The time delay at 1.25V between Vin and Vout is approximately 0.4 ns
c) From the plot in Figure 1, it is evident that an increase in the value of R results in a
lower output voltage
This study source was downloaded by 100000899606070 from CourseHero.com on 09-27-2025 00:50:27 GMT -05:00
https://www.coursehero.com/file/22802004/ELEC3500LAB1/