COEN 317 - Microprocessor-based Systems Assignment 2

1. Consider a subtraction instruction with flexible second operand Operand2: SUB Rd, Rn, Rm, LSL #n It is desired to modify this instruction to the following new syntax: SUB Rd, Rm, LSL #n, Rn This new syntax can be called subtraction instruction with flexible first operand Operand1. What minimum change in the hardware architecture is required for the implementation of this instruction? Please draw hardware modifications. (10 points) Microprocessor-based Systems – Assignment 2 Solution 1: A shifter must be added between the first operand and the ALU input. The first operand is given to the shift unit before passing to the ALU as an input. ALU Register Bank Read reg2 Write reg Read reg1 Operand 1 Operand 2 Shifter 2. Assume you want to design the instruction fields for a simple processor, which has only 64 instructions. The registers bank is made of 32 8-bit registers. If you would design the instruction fields, what would be the range of bits for each field in the following cases: (24 points) a) The instruction field is 16 bits fixed, and it is made of Rds (one register for both source and destination), Rs, immediate, and opcode fields, and only the first 6 registers can be used for Rs and Rds in the instruction. b) The instruction field is 32 bits fixed, and it is made of Rd, Rs1, and Rs2 (separate registers for source and destination), immediate, and opcode fields. c) The instruction field is 32 bits fixed, and it is made of Rds (one register for source and destination), Rs, and immediate and opcode fields.