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Interrupt-Driven I/O and Direct Memory Access (DMA) in Computer Systems

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This document explains interrupt-driven I/O, where the CPU is notified only when an I/O device is ready, improving efficiency over programmed I/O. It details the steps of interrupt-based I/O processing, including the role of device drivers and interrupt handlers. The second part introduces Direct Memory Access (DMA), which enables high-speed data transfer directly between memory and peripherals without CPU involvement. The lecture covers DMA operations, cycle stealing, burst mode, DMA controller registers, and CPU–DMA bus arbitration, emphasizing increased system performance for large-volume transfers.

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Academic Session 2025-26
ODD Semester Jul-Dec 2025

UNIVERSITY INSTITUTE OF ENGINEERING
DEPARTMENT OF COMPUTER SCIENCE &
ENGINEERING
BACHELOR OF ENGINEERING
CSE/IT/ THIRD SEMESTER
COMPUTER ORGANIZATION & ARCHITECTURE
(24CST-201/24ITT-201)
Unit No. 3 Chapter No. 3.1 Lecture No. 3.1.4
Topic : Interrupt driven I/O, DMA
Er. Shikha Atwal (E11186) Assistant Professor

, Learning Objectives
1




1. To understand the concept and working of interrupt-
driven I/O, where the CPU is notified only when the I/O
device is ready.
2. To learn how DMA enables direct data transfer between
memory and I/O devices without continuous CPU
involvement.
3. To analyze the advantages, limitations, and use cases of
both interrupt-driven I/O and DMA in improving system
performance and efficiency.

, Content
2




1. Interrupt-Driven I/O
2. Basic Operations of Interrupt
3. Interrupt Processing
4. Direct Memory Access (DMA)
5. DMA Controller
6. DMA Transfer
7. DMA Operations

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Uploaded on
December 8, 2025
Number of pages
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Written in
2025/2026
Type
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