WGU D386 Hardware And Operating Systems
Essentials | Questions And Verified Answers | Latest
2026
Central Processing Unit (CPU)
Often referred to as the brain of the computer, is a crucial component
responsible for executing instructions from computer programs.
Arithmetic Logic Unit (ALU)
Function: Performs arithmetic and logical operations (addition, subtraction,
multiplication, division, AND, OR, NOT, etc.).
Importance: Essential for executing mathematical calculations and decision-
making processes.
Control Unit (CU)
Function: Directs the operation of the processor. It tells the computer's memory,
ALU, and I/O devices how to respond to the instructions that have been sent to
the processor.
Importance: Coordinates how data moves around the CPU and controls the flow
of data between the CPU and other components of the computer.
Registers
Function: Small, fast storage locations within the CPU that hold data and
instructions temporarily.
Importance: Provide quick access to frequently used data and instructions,
enhancing processing speed.
Accumulator (ACC)
Stores the results of arithmetic and logical operations performed by the CPU's
Arithmetic Logic Unit (ALU). It holds the intermediate results of calculations
during program execution.
Program Counter (PC)
,A special register that holds the memory address of the next instruction to be
fetched and executed by the CPU.
Memory Address Register (MAR)
A register that holds the memory address of the data or instruction being
accessed or manipulated in the computer's memory.
Memory Data Register (MDR)
A register that temporarily holds the data fetched from or to be written to the
computer's memory.
Cache Memory
Function: Provides high-speed data access to the CPU, reducing the time needed
to fetch data from the main memory (RAM).
Importance: Larger and faster caches can significantly improve CPU
L1 Cache
Proximity to CPU: Closest to the CPU cores.
Speed: Fastest among all cache levels due to its proximity and high-speed
SRAM technology.
Size: Smallest in size, typically ranging from 16KB to 128KB per core.
Purpose: Primarily stores frequently accessed data and instructions to reduce
latency and improve the CPU's processing speed.
Structure: Often split into two separate caches: one for instructions (L1i) and
one for data (L1d).
L2 Cache
Proximity to CPU: Sits between the L1 cache and the main memory (RAM).
Speed: Slower than L1 but faster than L3 cache and main memory.
Size: Larger than L1, typically ranging from 256KB to several megabytes per
core.
Purpose: Acts as an intermediary store between L1 and L3, holding data and
,instructions that are less frequently accessed than those in L1 but more
frequently than those in RAM.
Structure: Can be either unified (storing both data and instructions) or split,
similar to L1.
L3 Cache
Proximity to CPU: Shared among multiple CPU cores within the same
processor.
Speed: Slower than L2 but faster than main memory.
Size: Larger than L2, typically ranging from a few megabytes to tens of
megabytes, depending on the CPU architecture.
Purpose: Provides a larger, shared cache that can store data and instructions
accessible by all cores, reducing the need to fetch from slower main memory.
Structure: Typically unified, storing both data and instructions.
Pipelining
A CPU function that Is a hardware technique to increase the instruction
throughput of a CPU by overlapping instruction execution stages.
Stages of Pipelining
Fetch: Retrieving the instruction from memory.
Decode: Interpreting the instruction and preparing the necessary control signals.
Execute: Performing the operation specified by the instruction (e.g., arithmetic
or logic operations).
Memory Access: Reading from or writing to memory, if required by the
instruction.
Write Back: Writing the result back to the register file.
Multithreading
, An application function that involves executing multiple threads within a single
process concurrently, improving CPU utilization and performance for
multithreaded applications.
Thread
The smallest unit of execution within a process. A process can contain multiple,
each running independently but sharing the same resources, such as memory
and file handles.
Resource Sharing
Threads within the same process share resources like memory and data, which
can lead to more efficient use of resources.
Parallelism
Executing multiple threads simultaneously, which can be particularly beneficial
in computationally intensive tasks.
Multitasking
An OS-level feature that allows multiple processes to run concurrently,
providing the ability to run multiple applications simultaneously.
Preemptive Multitasking
The OS determines when a process should pause to allow another process to
execute. It allocates time slices to each process.
Cooperative Multitasking
Each process voluntarily yields control to allow other processes to run.
Processes must be designed to provide time to the OS.
RAM (Random Access Memory)
Stores data and instructions that the CPU needs quickly.
Asynchronous RAM (ARAM)
A type of RAM where memory operations are not synchronized to a clock
signal.
Each operation (read or write) is initiated independently and can occur at any
time without needing to wait for a clock edge.
DRAM (Dynamic Random Access Memory)
Essentials | Questions And Verified Answers | Latest
2026
Central Processing Unit (CPU)
Often referred to as the brain of the computer, is a crucial component
responsible for executing instructions from computer programs.
Arithmetic Logic Unit (ALU)
Function: Performs arithmetic and logical operations (addition, subtraction,
multiplication, division, AND, OR, NOT, etc.).
Importance: Essential for executing mathematical calculations and decision-
making processes.
Control Unit (CU)
Function: Directs the operation of the processor. It tells the computer's memory,
ALU, and I/O devices how to respond to the instructions that have been sent to
the processor.
Importance: Coordinates how data moves around the CPU and controls the flow
of data between the CPU and other components of the computer.
Registers
Function: Small, fast storage locations within the CPU that hold data and
instructions temporarily.
Importance: Provide quick access to frequently used data and instructions,
enhancing processing speed.
Accumulator (ACC)
Stores the results of arithmetic and logical operations performed by the CPU's
Arithmetic Logic Unit (ALU). It holds the intermediate results of calculations
during program execution.
Program Counter (PC)
,A special register that holds the memory address of the next instruction to be
fetched and executed by the CPU.
Memory Address Register (MAR)
A register that holds the memory address of the data or instruction being
accessed or manipulated in the computer's memory.
Memory Data Register (MDR)
A register that temporarily holds the data fetched from or to be written to the
computer's memory.
Cache Memory
Function: Provides high-speed data access to the CPU, reducing the time needed
to fetch data from the main memory (RAM).
Importance: Larger and faster caches can significantly improve CPU
L1 Cache
Proximity to CPU: Closest to the CPU cores.
Speed: Fastest among all cache levels due to its proximity and high-speed
SRAM technology.
Size: Smallest in size, typically ranging from 16KB to 128KB per core.
Purpose: Primarily stores frequently accessed data and instructions to reduce
latency and improve the CPU's processing speed.
Structure: Often split into two separate caches: one for instructions (L1i) and
one for data (L1d).
L2 Cache
Proximity to CPU: Sits between the L1 cache and the main memory (RAM).
Speed: Slower than L1 but faster than L3 cache and main memory.
Size: Larger than L1, typically ranging from 256KB to several megabytes per
core.
Purpose: Acts as an intermediary store between L1 and L3, holding data and
,instructions that are less frequently accessed than those in L1 but more
frequently than those in RAM.
Structure: Can be either unified (storing both data and instructions) or split,
similar to L1.
L3 Cache
Proximity to CPU: Shared among multiple CPU cores within the same
processor.
Speed: Slower than L2 but faster than main memory.
Size: Larger than L2, typically ranging from a few megabytes to tens of
megabytes, depending on the CPU architecture.
Purpose: Provides a larger, shared cache that can store data and instructions
accessible by all cores, reducing the need to fetch from slower main memory.
Structure: Typically unified, storing both data and instructions.
Pipelining
A CPU function that Is a hardware technique to increase the instruction
throughput of a CPU by overlapping instruction execution stages.
Stages of Pipelining
Fetch: Retrieving the instruction from memory.
Decode: Interpreting the instruction and preparing the necessary control signals.
Execute: Performing the operation specified by the instruction (e.g., arithmetic
or logic operations).
Memory Access: Reading from or writing to memory, if required by the
instruction.
Write Back: Writing the result back to the register file.
Multithreading
, An application function that involves executing multiple threads within a single
process concurrently, improving CPU utilization and performance for
multithreaded applications.
Thread
The smallest unit of execution within a process. A process can contain multiple,
each running independently but sharing the same resources, such as memory
and file handles.
Resource Sharing
Threads within the same process share resources like memory and data, which
can lead to more efficient use of resources.
Parallelism
Executing multiple threads simultaneously, which can be particularly beneficial
in computationally intensive tasks.
Multitasking
An OS-level feature that allows multiple processes to run concurrently,
providing the ability to run multiple applications simultaneously.
Preemptive Multitasking
The OS determines when a process should pause to allow another process to
execute. It allocates time slices to each process.
Cooperative Multitasking
Each process voluntarily yields control to allow other processes to run.
Processes must be designed to provide time to the OS.
RAM (Random Access Memory)
Stores data and instructions that the CPU needs quickly.
Asynchronous RAM (ARAM)
A type of RAM where memory operations are not synchronized to a clock
signal.
Each operation (read or write) is initiated independently and can occur at any
time without needing to wait for a clock edge.
DRAM (Dynamic Random Access Memory)
