1|Page
ITE 221 EXAM 3 | UPDATED 2025–2026
GUARANTEED PASS EDITION | 100% VERIFIED
ANSWERS & FULL INFORMATION TECHNOLOGY
RATIONALES
A(n) _____ cache is generally implemented on the
same chip as the CPU.
- ANSWER-L1 or level one
A(n) _____ is an area of fast memory where data
held in a storage device is prefetched in
anticipation of future requests for the data.
- ANSWER-cache
A cache controller is a hardware device that
initiates a(n) _____ when it detects a cache miss.
- ANSWER-cache swap
The _____ transmits command, timing, and status
signals between devices in a computer system
and carries interrupts, command responses,
status codes, and similar messages.
- ANSWER-control bus
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The _____ is a special-purpose register that
always points to the next empty address in the
stack.
- ANSWER-stack pointer
The set of register values stored in the stack while
processing an interrupt is also called the _____.
- ANSWER-machine state
A(n) _____ is a program stored in a separate part
of primary storage to process a specific interrupt.
- ANSWER-interrupt handler
During interrupt processing, register values of a
suspended process are held on the _____.
- ANSWER-stack
A(n) _____ is a special-purpose processor
dedicated to managing cache content.
- ANSWER-cache controller
The _____ transmits a memory address when
primary storage is the sending or receiving device.
- ANSWER-address bus
, 3|Page
The CPU and bus normally view and storage
device as a(n) _____, ignoring the device's
physical storage organization.
- ANSWER-linear address space
Part of a device controller's function is to
translate _____ into physical accesses.
- ANSWER-logical accesses
A(n) _____ controller assumes the role of bus
master for all transfers between memory and
other storage or I/O devices, leaving the CPU free
to execute computation and data movement
instructions.
- ANSWER-DMA
A(n) _____ is a high-capacity device controller
used in mainframe computers.
- ANSWER-channel
When a read operation accesses data already
contained in the cache, it's called a(n) _____.
- ANSWER-cache hit
ITE 221 EXAM 3 | UPDATED 2025–2026
GUARANTEED PASS EDITION | 100% VERIFIED
ANSWERS & FULL INFORMATION TECHNOLOGY
RATIONALES
A(n) _____ cache is generally implemented on the
same chip as the CPU.
- ANSWER-L1 or level one
A(n) _____ is an area of fast memory where data
held in a storage device is prefetched in
anticipation of future requests for the data.
- ANSWER-cache
A cache controller is a hardware device that
initiates a(n) _____ when it detects a cache miss.
- ANSWER-cache swap
The _____ transmits command, timing, and status
signals between devices in a computer system
and carries interrupts, command responses,
status codes, and similar messages.
- ANSWER-control bus
,2|Page
The _____ is a special-purpose register that
always points to the next empty address in the
stack.
- ANSWER-stack pointer
The set of register values stored in the stack while
processing an interrupt is also called the _____.
- ANSWER-machine state
A(n) _____ is a program stored in a separate part
of primary storage to process a specific interrupt.
- ANSWER-interrupt handler
During interrupt processing, register values of a
suspended process are held on the _____.
- ANSWER-stack
A(n) _____ is a special-purpose processor
dedicated to managing cache content.
- ANSWER-cache controller
The _____ transmits a memory address when
primary storage is the sending or receiving device.
- ANSWER-address bus
, 3|Page
The CPU and bus normally view and storage
device as a(n) _____, ignoring the device's
physical storage organization.
- ANSWER-linear address space
Part of a device controller's function is to
translate _____ into physical accesses.
- ANSWER-logical accesses
A(n) _____ controller assumes the role of bus
master for all transfers between memory and
other storage or I/O devices, leaving the CPU free
to execute computation and data movement
instructions.
- ANSWER-DMA
A(n) _____ is a high-capacity device controller
used in mainframe computers.
- ANSWER-channel
When a read operation accesses data already
contained in the cache, it's called a(n) _____.
- ANSWER-cache hit
